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authorGregory CLEMENT <gregory.clement@bootlin.com>2018-04-20 16:52:52 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-04-20 16:24:20 +0200
commit3ae2da7b28b393d4f6faef3d384cc725ef39716b (patch)
tree3a5705f84f56ca5a0c2e9abb993410f9ff1dadc9 /Documentation
parent2d79609bf21eedb2142f9dff7d4af9919cd7399a (diff)
downloadlinux-0-day-3ae2da7b28b393d4f6faef3d384cc725ef39716b.tar.gz
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usb: host: xhci-plat: Fix clock resource by adding a register clock
On Armada 7K/8K we need to explicitly enable the register clock. This clock is optional because not all the SoCs using this IP need it but at least for Armada 7K/8K it is actually mandatory. The change was done at xhci-plat level and not at a xhci-mvebu.c because, it is expected that other SoC would have this kind of constraint. The binding documentation is updating accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/usb/usb-xhci.txt5
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
index c4c00dff4b569..bd1dd316fb231 100644
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
@@ -28,7 +28,10 @@ Required properties:
- interrupts: one XHCI interrupt should be described here.
Optional properties:
- - clocks: reference to a clock
+ - clocks: reference to the clocks
+ - clock-names: mandatory if there is a second clock, in this case
+ the name must be "core" for the first clock and "reg" for the
+ second one
- usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
- usb3-lpm-capable: determines if platform is USB3 LPM capable
- quirk-broken-port-ped: set if the controller has broken port disable mechanism