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| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-02 12:29:57 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-28 12:22:41 +0200 |
| commit | fbdc674ba33c3791b315a546019e570e3e94e599 (patch) | |
| tree | e12c887a9d58020db9f7bc27f6ed6c4c1401aba4 /arch/mips/boot/dts/mti/sead3.dts | |
| parent | 032a469b1e6ef02209308a5b107c10beb4b12fb6 (diff) | |
| download | linux-0-day-fbdc674ba33c3791b315a546019e570e3e94e599.tar.gz linux-0-day-fbdc674ba33c3791b315a546019e570e3e94e599.tar.xz | |
MIPS: SEAD-3: Set interrupt-parent per-device, not at root node
The SEAD-3 board may be configured with or without a MIPS Global
Interrupt Controller (GIC). Because of this we have a device tree with a
default case of a GIC present, and code to fixup the device tree based
upon a configuration register that indicates the presence of the GIC.
In order to keep this DT fixup code simple, the interrupt-parent
property was specified at the root node of the SEAD-3 DT, allowing the
fixup code to simply change this property to the phandle of the CPU
interrupt controller if a GIC is not present & affect all
interrupt-using devices at once. This however causes a problem if we do
have a GIC & the device tree is used as-is, because the interrupt-parent
property of the root node applies to the CPU interrupt controller node.
This causes a cycle when of_irq_init() attempts to probe interrupt
controllers in order and boots fail due to a lack of configured
interrupts, with this message printed on the kernel console:
[ 0.000000] OF: of_irq_init: children remain, but no parents
Fix this by removing the interrupt-parent property from the DT root node
& instead setting it for each device which uses interrupts, ensuring
that the CPU interrupt controller node has no interrupt-parent &
allowing of_irq_init() to identify it as the root interrupt controller.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reported-by: Keng Koh <keng.koh@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16187/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot/dts/mti/sead3.dts')
| -rw-r--r-- | arch/mips/boot/dts/mti/sead3.dts | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts index f327791cbcb5c..cabe256f9a684 100644 --- a/arch/mips/boot/dts/mti/sead3.dts +++ b/arch/mips/boot/dts/mti/sead3.dts @@ -11,7 +11,6 @@ #size-cells = <1>; compatible = "mti,sead-3"; model = "MIPS SEAD-3"; - interrupt-parent = <&gic>; chosen { stdout-path = "serial1:115200"; @@ -60,6 +59,7 @@ compatible = "generic-ehci"; reg = <0x1b200000 0x1000>; + interrupt-parent = <&gic>; interrupts = <0>; /* GIC 0 or CPU 6 */ has-transaction-translator; @@ -222,6 +222,7 @@ clock-frequency = <14745600>; + interrupt-parent = <&gic>; interrupts = <3>; /* GIC 3 or CPU 4 */ no-loopback-test; @@ -236,6 +237,7 @@ clock-frequency = <14745600>; + interrupt-parent = <&gic>; interrupts = <2>; /* GIC 2 or CPU 4 */ no-loopback-test; @@ -246,6 +248,7 @@ reg = <0x1f010000 0x10000>; reg-io-width = <4>; + interrupt-parent = <&gic>; interrupts = <0>; /* GIC 0 or CPU 6 */ phy-mode = "mii"; |