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| author | Kirill A. Shutemov <kirill.shutemov@linux.intel.com> | 2018-02-14 14:16:49 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2018-02-14 13:11:13 +0100 |
| commit | 02390b87a9459937cdb299e6b34ff33992512ec7 (patch) | |
| tree | 6994553d9db1e2fb5abf05cfc676d6fc61488c36 /arch/x86/include/asm/pgtable_64_types.h | |
| parent | b83ce5ee91471d19c403ff91227204fb37c95fb2 (diff) | |
| download | linux-0-day-02390b87a9459937cdb299e6b34ff33992512ec7.tar.gz linux-0-day-02390b87a9459937cdb299e6b34ff33992512ec7.tar.xz | |
mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS
With boot-time switching between paging mode we will have variable
MAX_PHYSMEM_BITS.
Let's use the maximum variable possible for CONFIG_X86_5LEVEL=y
configuration to define zsmalloc data structures.
The patch introduces MAX_POSSIBLE_PHYSMEM_BITS to cover such case.
It also suits well to handle PAE special case.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Reviewed-by: Nitin Gupta <ngupta@vflare.org>
Acked-by: Minchan Kim <minchan@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20180214111656.88514-3-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/pgtable_64_types.h')
| -rw-r--r-- | arch/x86/include/asm/pgtable_64_types.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index 6b8f73dcbc2c2..7168de7d34ebd 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -40,6 +40,8 @@ typedef struct { pteval_t pte; } pte_t; #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT) #define P4D_MASK (~(P4D_SIZE - 1)) +#define MAX_POSSIBLE_PHYSMEM_BITS 52 + #else /* CONFIG_X86_5LEVEL */ /* |