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path: root/arch/x86/include/asm/pgtable_64_types.h
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* x86/mm: Fix guard hole handlingKirill A. Shutemov2018-12-111-0/+5
* x86/mm: Move LDT remap out of KASLR region on 5-level pagingKirill A. Shutemov2018-11-061-3/+1
* x86/ldt: Define LDT_END_ADDRJoerg Roedel2018-07-201-0/+1
* x86/pgtable: Move two more functions from pgtable_64.h to pgtable.hJoerg Roedel2018-07-201-0/+2
* x86/mm: Stop pretending pgtable_l5_enabled is a variableKirill A. Shutemov2018-05-191-5/+9
* x86/mm: Unify pgtable_l5_enabled usage in early boot codeKirill A. Shutemov2018-05-191-3/+10
* x86/mm: Make vmemmap and vmalloc base address constants unsigned longJiri Kosina2018-04-261-4/+4
* x86/mm: Optimize boot-time paging mode switching costKirill A. Shutemov2018-02-211-1/+4
* x86/mm: Initialize vmemmap_base at boot-timeKirill A. Shutemov2018-02-161-6/+3
* x86/mm: Adjust vmalloc base and size at boot-timeKirill A. Shutemov2018-02-161-6/+10
* x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamicKirill A. Shutemov2018-02-141-1/+1
* x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variableKirill A. Shutemov2018-02-141-7/+12
* x86/mm: Make LDT_BASE_ADDR dynamicKirill A. Shutemov2018-02-141-4/+5
* x86/mm: Introduce 'pgtable_l5_enabled'Kirill A. Shutemov2018-02-141-0/+6
* x86/mm: Make virtual memory layout dynamic for CONFIG_X86_5LEVEL=yKirill A. Shutemov2018-02-141-2/+2
* mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITSKirill A. Shutemov2018-02-141-0/+2
* x86/kaslr: Fix the vaddr_end messThomas Gleixner2018-01-051-1/+7
* x86/mm: Map cpu_entry_area at the same place on 4/5 levelThomas Gleixner2018-01-041-2/+2
* x86/mm: Set MODULES_END to 0xffffffffff000000Andrey Ryabinin2018-01-041-1/+1
* x86/pti: Put the LDT in its own PGD if PTI is onAndy Lutomirski2017-12-231-0/+4
* x86/mm/64: Make a full PGD-entry size hole in the memory mapAndy Lutomirski2017-12-231-2/+2
* x86/cpu_entry_area: Move it out of the fixmapThomas Gleixner2017-12-221-19/+28
* License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
* x86/espfix: Add support for 5-level pagingKirill A. Shutemov2017-04-041-1/+1
* x86/mm: Add basic defines/helpers for CONFIG_X86_5LEVEL=yKirill A. Shutemov2017-04-041-0/+20
* x86/mm: Define virtual memory map for 5-level pagingKirill A. Shutemov2017-04-041-0/+6
* x86/mm: Adapt MODULES_END based on fixmap section sizeThomas Garnier2017-03-161-1/+2
* x86/mm: Extend headers with basic definitions to support 5-level pagingKirill A. Shutemov2017-03-141-0/+1
* x86/mm/64: Enable KASLR for vmemmap memory regionThomas Garnier2016-08-101-1/+3
* x86/mm: Enable KASLR for vmalloc memory regionsThomas Garnier2016-07-081-4/+11
* x86: expose number of page table levels on Kconfig levelKirill A. Shutemov2015-04-141-1/+0
* x86, ptdump: Add section for EFI runtime servicesMathias Krause2014-11-111-0/+2
* x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stackH. Peter Anvin2014-04-301-0/+2
* x86, kaslr: Raise the maximum virtual address to -1 GiB on x86_64Kees Cook2013-10-131-1/+1
* x86, 64bit: Use a #PF handler to materialize early mappings on demandH. Peter Anvin2013-01-291-0/+4
* x86: 46 bit physical address support on 64 bitsRik van Riel2009-05-051-4/+4
* x86: move more pagetable-related definitions into pgtable*.hJeremy Fitzhardinge2009-02-131-0/+1
* x86: move pte types into pgtable*.hJeremy Fitzhardinge2009-02-111-0/+16
* x86: Split pgtable_64.h into pgtable_64_types.h and pgtable_64.hJeremy Fitzhardinge2009-02-111-0/+46
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