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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-01-29 00:33:08 +0100 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-04-16 12:03:22 +0200 |
| commit | 5cfe2d151f8f55052f5463e725d3d3a4aa51335d (patch) | |
| tree | b645697ab42596ed34abd02d272228f15c70d2e3 /drivers/clocksource/sh_tmu.c | |
| parent | a5de49f436e2bc498c1d13f6f8a9afaf19cb5f95 (diff) | |
| download | linux-0-day-5cfe2d151f8f55052f5463e725d3d3a4aa51335d.tar.gz linux-0-day-5cfe2d151f8f55052f5463e725d3d3a4aa51335d.tar.xz | |
clocksource: sh_tmu: Replace hardcoded register values with macros
Define symbolic macros for all used registers bits.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/clocksource/sh_tmu.c')
| -rw-r--r-- | drivers/clocksource/sh_tmu.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index 55b7a37f0c9b2..63ed92d56c8fa 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -69,6 +69,15 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock); #define TCNT 1 /* channel register */ #define TCR 2 /* channel register */ +#define TCR_UNF (1 << 8) +#define TCR_UNIE (1 << 5) +#define TCR_TPSC_CLK4 (0 << 0) +#define TCR_TPSC_CLK16 (1 << 0) +#define TCR_TPSC_CLK64 (2 << 0) +#define TCR_TPSC_CLK256 (3 << 0) +#define TCR_TPSC_CLK1024 (4 << 0) +#define TCR_TPSC_MASK (7 << 0) + static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) { unsigned long offs; @@ -140,7 +149,7 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch) /* configure channel to parent clock / 4, irq off */ ch->rate = clk_get_rate(ch->tmu->clk) / 4; - sh_tmu_write(ch, TCR, 0x0000); + sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); /* enable channel */ sh_tmu_start_stop_ch(ch, 1); @@ -165,7 +174,7 @@ static void __sh_tmu_disable(struct sh_tmu_channel *ch) sh_tmu_start_stop_ch(ch, 0); /* disable interrupts in TMU block */ - sh_tmu_write(ch, TCR, 0x0000); + sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); /* stop clock */ clk_disable(ch->tmu->clk); @@ -195,7 +204,7 @@ static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, sh_tmu_read(ch, TCR); /* enable interrupt */ - sh_tmu_write(ch, TCR, 0x0020); + sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4); /* reload delta value in case of periodic timer */ if (periodic) @@ -215,9 +224,9 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id) /* disable or acknowledge interrupt */ if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT) - sh_tmu_write(ch, TCR, 0x0000); + sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); else - sh_tmu_write(ch, TCR, 0x0020); + sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4); /* notify clockevent layer */ ch->ced.event_handler(&ch->ced); |