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| author | Mike Marciniszyn <mike.marciniszyn@qlogic.com> | 2011-12-23 11:12:10 -0500 |
|---|---|---|
| committer | Roland Dreier <roland@purestorage.com> | 2012-01-03 20:54:01 -0800 |
| commit | 8d4548f2b7407f7212f71831bb7b457ceb752709 (patch) | |
| tree | ad1fb9783cccfbe803eeae77811f177659f9fd3d /drivers/infiniband/hw/qib/qib_pcie.c | |
| parent | 489471095170ed1c6d0341739a243461638b0e06 (diff) | |
| download | linux-0-day-8d4548f2b7407f7212f71831bb7b457ceb752709.tar.gz linux-0-day-8d4548f2b7407f7212f71831bb7b457ceb752709.tar.xz | |
IB/qib: Default some module parameters optimally
Minimize the need for users to have to set module parameters to get
good performance.
The following two parameters are changed:
- rcvhdrcnt to twice the rcvegrcnt
- pcie_caps=0x51
The rcvhdrcnt at twice the egrcount allows the preemptive NAK code
during reception to function in 100% of the cases rather than a sender
jiffies-based timeout.
The pcie_caps default of 0x51 will set the proposed MaxPayload and
MaxReceiveReqest to 256 and 4096 respectively. The capabilities on
the root complex will be used to limit those values.
Reviewed-by: Ram Vepa <ram.vepa@qlogic.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/qib/qib_pcie.c')
| -rw-r--r-- | drivers/infiniband/hw/qib/qib_pcie.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c index 97a8bdf68e605..f695061d688e0 100644 --- a/drivers/infiniband/hw/qib/qib_pcie.c +++ b/drivers/infiniband/hw/qib/qib_pcie.c @@ -560,9 +560,9 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd) * BIOS may not set PCIe bus-utilization parameters for best performance. * Check and optionally adjust them to maximize our throughput. */ -static int qib_pcie_caps; +static int qib_pcie_caps = 0x51; module_param_named(pcie_caps, qib_pcie_caps, int, S_IRUGO); -MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (4lsb), ReadReq (D4..7)"); +MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)"); static int qib_tune_pcie_caps(struct qib_devdata *dd) { |