summaryrefslogtreecommitdiffstats
path: root/drivers/misc/cxl/cxl.h
diff options
context:
space:
mode:
authorVaibhav Jain <vaibhav@linux.vnet.ibm.com>2017-10-09 23:26:27 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2017-10-10 20:17:49 +1100
commit8f6a90421c7637984fb352da079fb13172176bfd (patch)
tree41cf65bcff576d722582461fd615295194414671 /drivers/misc/cxl/cxl.h
parent5632874311dbf432c698fcbe0cf7a49e01ebf324 (diff)
downloadlinux-0-day-8f6a90421c7637984fb352da079fb13172176bfd.tar.gz
linux-0-day-8f6a90421c7637984fb352da079fb13172176bfd.tar.xz
cxl: Rename register PSL9_FIR2 to PSL9_FIR_MASK
PSL9 doesn't have a FIR2 register as was the case with PSL8. However currently the register definitions in 'cxl.h' have a definition for PSL9_FIR2 that actually points to PSL9_FIR_MASK register in the P1 area at offset 0x308. So this patch renames the def PSL9_FIR2 to PSL9_FIR_MASK and updates the references in the code to point to the new identifier. It also removes the code to dump contents of FIR2 (FIR_MASK actually) in cxl_native_irq_dump_regs_psl9(). Fixes: f24be42aab37 ("cxl: Add psl9 specific code") Reported-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl/cxl.h')
-rw-r--r--drivers/misc/cxl/cxl.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 0167df81df62b..252373c2b8613 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -104,7 +104,7 @@ static const cxl_p1_reg_t CXL_XSL9_INV = {0x0110};
static const cxl_p1_reg_t CXL_XSL9_DEF = {0x0140};
static const cxl_p1_reg_t CXL_XSL9_DSNCTL = {0x0168};
static const cxl_p1_reg_t CXL_PSL9_FIR1 = {0x0300};
-static const cxl_p1_reg_t CXL_PSL9_FIR2 = {0x0308};
+static const cxl_p1_reg_t CXL_PSL9_FIR_MASK = {0x0308};
static const cxl_p1_reg_t CXL_PSL9_Timebase = {0x0310};
static const cxl_p1_reg_t CXL_PSL9_DEBUG = {0x0320};
static const cxl_p1_reg_t CXL_PSL9_FIR_CNTL = {0x0348};