diff options
| author | Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> | 2017-10-26 17:18:40 +0530 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-10-27 23:48:30 +0900 |
| commit | 6f92a6544f1a4ed2d495a937283f01ee7d590fec (patch) | |
| tree | 343961d44e9a6bd82d069a786de5fa357c23b78f /drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h | |
| parent | 08c4901bfe0b3beb12e7a5d7749e3522d7b1471e (diff) | |
| download | linux-0-day-6f92a6544f1a4ed2d495a937283f01ee7d590fec.tar.gz linux-0-day-6f92a6544f1a4ed2d495a937283f01ee7d590fec.tar.xz | |
cxgb4: collect hardware misc dumps
Collect path mtu, PM stats, TP clock info, congestion control, and VPD
data dumps.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h b/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h index 9757609a86b9f..239c43084e778 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h @@ -49,6 +49,13 @@ struct cudbg_rss_vf_conf { u32 rss_vf_vfh; }; +struct cudbg_pm_stats { + u32 tx_cnt[T6_PM_NSTATS]; + u32 rx_cnt[T6_PM_NSTATS]; + u64 tx_cyc[T6_PM_NSTATS]; + u64 rx_cyc[T6_PM_NSTATS]; +}; + struct cudbg_hw_sched { u32 kbps[NTX_SCHED]; u32 ipg[NTX_SCHED]; @@ -85,6 +92,22 @@ struct cudbg_cim_pif_la { u8 data[0]; }; +struct cudbg_clk_info { + u64 retransmit_min; + u64 retransmit_max; + u64 persist_timer_min; + u64 persist_timer_max; + u64 keepalive_idle_timer; + u64 keepalive_interval; + u64 initial_srtt; + u64 finwait2_timer; + u32 dack_timer; + u32 res; + u32 cclk_ps; + u32 tre; + u32 dack_re; +}; + struct cudbg_tid_info_region { u32 ntids; u32 nstids; @@ -143,6 +166,19 @@ struct cudbg_mps_tcam { u8 reserved[2]; }; +struct cudbg_vpd_data { + u8 sn[SERNUM_LEN + 1]; + u8 bn[PN_LEN + 1]; + u8 na[MACADDR_LEN + 1]; + u8 mn[ID_LEN + 1]; + u16 fw_major; + u16 fw_minor; + u16 fw_micro; + u16 fw_build; + u32 scfg_vers; + u32 vpd_vers; +}; + #define CUDBG_NUM_ULPTX 11 #define CUDBG_NUM_ULPTX_READ 512 |