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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2018-03-06 15:33:09 +0100 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2018-03-06 17:39:16 +0100 |
| commit | ec4016ff6e60fffab2e34fe87578c6362147cb98 (patch) | |
| tree | 4574de4d8afc60c5765bfc48e43484a06f4f06a2 /drivers/soc | |
| parent | b06a532bf1fa99af0d9364e5dfb8654fa78d490b (diff) | |
| download | linux-0-day-ec4016ff6e60fffab2e34fe87578c6362147cb98.tar.gz linux-0-day-ec4016ff6e60fffab2e34fe87578c6362147cb98.tar.xz | |
clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP, GSC and MFC blocks require special handling for
power domain turn on/off sequences. Till now this was handled by Exynos
power domain driver, but that approach was limited only to some special
cases. This patch moves handling of those operations to clock controller
driver. This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/samsung/pm_domains.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c index cef30bdf19b1a..f2d6d7a09c166 100644 --- a/drivers/soc/samsung/pm_domains.c +++ b/drivers/soc/samsung/pm_domains.c @@ -148,6 +148,8 @@ static __init const char *exynos_get_domain_name(struct device_node *node) } static const char *soc_force_no_clk[] = { + "samsung,exynos5420-clock", + "samsung,exynos5800-clock", }; static __init int exynos4_pm_init_power_domain(void) |