diff options
| author | Olof Johansson <olof@lixom.net> | 2018-01-04 23:06:04 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2018-01-04 23:06:04 -0800 |
| commit | 8102324d862f50360646da6391019b8d0ccaf76c (patch) | |
| tree | b9aa36b8757b1ff9bcb89ccc74b1e67f80f3a095 /include/dt-bindings | |
| parent | 710ae35c2ebacdb491690a1800718929ddae565a (diff) | |
| parent | c5a2de97fbd2979fab291fb048084d3fddd322dd (diff) | |
| download | linux-0-day-8102324d862f50360646da6391019b8d0ccaf76c.tar.gz linux-0-day-8102324d862f50360646da6391019b8d0ccaf76c.tar.xz | |
Merge tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
TI sysc driver updates for v4.16 merge window
We now have gotten ti-sysc driver to the point where it can parse
interconnect target configuration from device tree instead of the
legacy platform data. This series updates the device tree binding
and adds parsing to the driver for quirks and capabilities.
* tag 'omap-for-v4.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Add parsing of module capabilities
bus: ti-sysc: Handle module quirks based dts configuration
bus: ti-sysc: Detect i2c interconnect target module based on register layout
bus: ti-sysc: Add register bits for interconnect target modules
bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data
ARM: OMAP2+: Move all omap_hwmod_sysc_fields to omap_hwmod_common_data.c
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones
dt-bindings: ti-sysc: Update binding for timers and capabilities
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/bus/ti-sysc.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h new file mode 100644 index 0000000000000..2c005376ac0e3 --- /dev/null +++ b/include/dt-bindings/bus/ti-sysc.h @@ -0,0 +1,22 @@ +/* TI sysc interconnect target module defines */ + +/* Generic sysc found on omap2 and later, also known as type1 */ +#define SYSC_OMAP2_CLOCKACTIVITY (3 << 8) +#define SYSC_OMAP2_EMUFREE (1 << 5) +#define SYSC_OMAP2_ENAWAKEUP (1 << 2) +#define SYSC_OMAP2_SOFTRESET (1 << 1) +#define SYSC_OMAP2_AUTOIDLE (1 << 0) + +/* Generic sysc found on omap4 and later, also known as type2 */ +#define SYSC_OMAP4_DMADISABLE (1 << 16) +#define SYSC_OMAP4_FREEEMU (1 << 1) /* Also known as EMUFREE */ +#define SYSC_OMAP4_SOFTRESET (1 << 0) + +/* SmartReflex sysc found on 36xx and later */ +#define SYSC_OMAP3_SR_ENAWAKEUP (1 << 26) + +/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */ +#define SYSC_IDLE_FORCE 0 +#define SYSC_IDLE_NO 1 +#define SYSC_IDLE_SMART 2 +#define SYSC_IDLE_SMART_WKUP 3 |