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authorShaokun Zhang <zhangshaokun@hisilicon.com>2017-10-19 19:05:18 +0800
committerWill Deacon <will.deacon@arm.com>2017-10-19 17:06:34 +0100
commit2940bc4333707a05e69b3ffd737bda0dc0c3004f (patch)
treea9a9bca2aac6ebc0f875e85ecd85c89620cdf134 /include/linux/cpuhotplug.h
parent6ce4ef94195da926245b58311119ed9d52428fdc (diff)
downloadlinux-0-day-2940bc4333707a05e69b3ffd737bda0dc0c3004f.tar.gz
linux-0-day-2940bc4333707a05e69b3ffd737bda0dc0c3004f.tar.xz
perf: hisi: Add support for HiSilicon SoC L3C PMU driver
This patch adds support for L3C PMU driver in HiSilicon SoC chip, Each L3C has own control, counter and interrupt registers and is an separate PMU. For each L3C PMU, it has 8-programable counters and each counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Anurup M <anurup.m@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/cpuhotplug.h')
-rw-r--r--include/linux/cpuhotplug.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
index 6d508767e1445..9621efdbb3bd7 100644
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -153,6 +153,7 @@ enum cpuhp_state {
CPUHP_AP_PERF_S390_SF_ONLINE,
CPUHP_AP_PERF_ARM_CCI_ONLINE,
CPUHP_AP_PERF_ARM_CCN_ONLINE,
+ CPUHP_AP_PERF_ARM_HISI_L3_ONLINE,
CPUHP_AP_PERF_ARM_L2X0_ONLINE,
CPUHP_AP_PERF_ARM_QCOM_L2_ONLINE,
CPUHP_AP_PERF_ARM_QCOM_L3_ONLINE,