diff options
| -rw-r--r-- | drivers/crypto/qat/qat_common/qat_uclo.c | 6 | ||||
| -rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h | 2 |
2 files changed, 2 insertions, 6 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c index 258009178031d..1e27f9f7fddf6 100644 --- a/drivers/crypto/qat/qat_common/qat_uclo.c +++ b/drivers/crypto/qat/qat_common/qat_uclo.c @@ -256,10 +256,6 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle, pr_err("QAT: Parse num for AE number failed\n"); return -EINVAL; } - if (!test_bit(*ae, (unsigned long *)&handle->hal_handle->ae_mask)) { - pr_err("QAT: ae %d to be init is fused off\n", *ae); - return -EINVAL; - } if (*ae >= ICP_QAT_UCLO_MAX_AE) { pr_err("QAT: ae %d out of range\n", *ae); return -EINVAL; @@ -456,7 +452,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle) (sizeof(struct icp_qat_uof_memvar_attr) * initmem->val_attr_num)); } - for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) { + for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { if (qat_hal_batch_wr_lm(handle, ae, obj_handle->lm_init_tab[ae])) { pr_err("QAT: fail to batch init lmem for AE %d\n", ae); diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h index c5ce236aa9798..b707f292b377f 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h +++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h @@ -59,7 +59,7 @@ #define ADF_DH895XCC_FUSECTL_SKU_4 0x3 #define ADF_DH895XCC_MAX_ACCELERATORS 6 #define ADF_DH895XCC_MAX_ACCELENGINES 12 -#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 18 +#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13 #define ADF_DH895XCC_ACCELERATORS_MASK 0x3F #define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF #define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C |