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* Merge branch 'lorenzo/pci/endpoint'Bjorn Helgaas2018-06-062-16/+35
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai) - add configfs entries for pci_epf_driver device IDs (Kishon Vijay Abraham I) - clean up pci_endpoint_test driver (Gustavo Pimentel) * lorenzo/pci/endpoint: PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry misc: pci_endpoint_test: Use pci_irq_vector function PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters misc: pci_endpoint_test: Replace lower into upper case characters PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()
| * PCI: endpoint: Create configfs entry for each pci_epf_device_id table entryKishon Vijay Abraham I2018-05-181-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | In order to be able to provide correct driver_data for pci_epf device, a separate configfs entry for each pci_epf_device_id table entry in pci_epf_driver is required. Add support to create configfs entry for each pci_epf_device_id table entry here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
| * PCI: endpoint: functions/pci-epf-test: Replace lower into upper case charactersGustavo Pimentel2018-05-151-13/+13
| | | | | | | | | | | | | | | | Replace all initial lower case character into upper case in comments and debug printks. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| * PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()Jia-Ju Bai2018-05-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_epf_test_write() is never called in atomic context. The call chain ending up at pci_epf_test_write() is: [1] pci_epf_test_write() <- pci_epf_test_cmd_handler() pci_epf_test_cmd_handler() is set as a parameter of INIT_DELAYED_WORK() in pci_epf_test_probe(). This function is not called in atomic context. Despite never getting called from atomic context, pci_epf_test_write() calls mdelay() to busy wait. This is not necessary and can be replaced with usleep_range() to avoid busy waiting. Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* | PCI: dwc: Add support for EP modeGustavo Pimentel2018-05-151-0/+7
|/ | | | | | | | | | | | | | The PCIe controller dual mode is capable of operating in Root Complex (RC) mode as well as EP mode by configuration option. Add EP support to the DesignWare driver on top of RC mode support. Add new property on pci_epc structure which allow to configure pci_epf_test driver accordingly to the controller specific requirements. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearingNiklas Cassel2018-04-031-1/+3
| | | | | | | | | | | | Since a 64-bit BAR consists of a BAR pair, and since there is no BAR after BAR_5, BAR_5 cannot be 64-bits wide. This sanity check is done in pci_epc_clear_bar(), so that we don't need to do this sanity check in all epc->ops->clear_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct ↵Niklas Cassel2018-04-032-4/+8
| | | | | | | | | | | | | | | | *epf_bar Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar. This is needed so that epc->ops->clear_bar() can clear the BAR pair, if the BAR is 64-bits wide. This also makes it possible for pci_epc_clear_bar() to sanity check the flags. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
* PCI: endpoint: Handle 64-bit BARs properlyNiklas Cassel2018-04-031-0/+7
| | | | | | | | | | | | | | If a 64-bit BAR was set-up, we need to skip a BAR, since a 64-bit BAR consists of a BAR pair. We need to check what BAR width the epc->ops->set_bar() specific implementation actually did set-up, since some drivers, like the Cadence EP controller, sometimes sets up a 64-bit BAR, even though a 32-bit BAR was requested. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not setNiklas Cassel2018-04-031-1/+3
| | | | | | | | | | | | Setting a BAR size > 4 GB is invalid if PCI_BASE_ADDRESS_MEM_TYPE_64 flag is not set. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Setting 64-bit/prefetch bit is invalid when IO is setNiklas Cassel2018-04-031-1/+4
| | | | | | | | | | | | If flag PCI_BASE_ADDRESS_SPACE_IO is set, also having any PCI_BASE_ADDRESS_MEM_* bit set is invalid. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Setting BAR_5 to 64-bits wide is invalidNiklas Cassel2018-04-031-1/+3
| | | | | | | | | | | | Since a 64-bit BAR consists of a BAR pair, and since there is no BAR after BAR_5, BAR_5 cannot be 64-bits wide. This sanity check is done in pci_epc_set_bar(), so that we don't need to do this sanity check in all epc->ops->set_bar() implementations. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Simplify epc->ops->set_bar()/pci_epc_set_bar()Niklas Cassel2018-04-033-12/+10
| | | | | | | | | | | | | | Add barno and flags to struct epf_bar. That way we can simplify epc->ops->set_bar()/pci_epc_set_bar() by passing a struct *epf_bar instead of a whole lot of arguments. This is needed so that epc->ops->set_bar() implementations can modify BAR flags. Will be utilized in a succeeding patch. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: BAR width should not depend on sizeof dma_addr_tNiklas Cassel2018-04-031-5/+7
| | | | | | | | | | | | | | | | | | | | | | | If a BAR supports 64-bit width or not depends on the hardware, and should thus not depend on sizeof(dma_addr_t). If a certain hardware doesn't support 64-bit BARs, its epc->ops->set_bar() implementation should return -EINVAL when PCI_BASE_ADDRESS_MEM_TYPE_64 is set. We can't change pci_epc_set_bar() to only set PCI_BASE_ADDRESS_MEM_TYPE_64 based on size, since if the user, for some reason, wants to configure a BAR with a 64-bit width, even though the BAR size is less than 4 GB, he should be able to do that. However, since pci-epf-test is simply a test and not an API, we can set PCI_BASE_ADDRESS_MEM_TYPE_64 in pci-epf-test itself only based on size. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Remove goto labels in pci_epf_create()Rolf Evers-Fischer2018-03-011-20/+12
| | | | | | | | | Remove the pci_epf_create() goto labels completely and handle the errors at the respective call site to simplify the function error handling. Signed-off-by: Rolf Evers-Fischer <rolf.evers.fischer@aptiv.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
* PCI: endpoint: Fix kernel panic after put_device()Rolf Evers-Fischer2018-03-011-1/+1
| | | | | | | | | | | | | | 'put_device()' calls the relase function 'pci_epf_dev_release()', which already frees 'epf->name' and 'epf'. Therefore we must not free them again after 'put_device()'. Fixes: 5e8cb4033807 ("PCI: endpoint: Add EP core layer to enable EP controller and EP functions") Signed-off-by: Rolf Evers-Fischer <rolf.evers.fischer@aptiv.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
* PCI: endpoint: Simplify name allocation for EPF deviceRolf Evers-Fischer2018-03-011-18/+4
| | | | | | | | | | | | | | This commit replaces allocating and freeing the intermediate 'buf'/'func_name' with a combination of 'kstrndup()' and 'len'. 'len' is the required length of 'epf->name'. 'epf->name' should be either the first part of 'name' preceding the '.' or the complete 'name', if there is no '.' in the name. Signed-off-by: Rolf Evers-Fischer <rolf.evers.fischer@aptiv.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
* Merge branch 'pci/spdx' into nextBjorn Helgaas2018-02-019-60/+9
|\ | | | | | | | | | | | | | | | | * pci/spdx: PCI: Add SPDX GPL-2.0+ to replace implicit GPL v2 or later statement PCI: Add SPDX GPL-2.0+ to replace GPL v2 or later boilerplate PCI: Add SPDX GPL-2.0 to replace COPYING boilerplate PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplate PCI: Add SPDX GPL-2.0 when no license was specified
| * PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplateBjorn Helgaas2018-01-285-60/+5
| | | | | | | | | | | | | | | | | | | | | | Add SPDX GPL-2.0 to all PCI files that specified the GPL version 2 license. Remove the boilerplate GPL version 2 language, relying on the assertion in b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") that the SPDX identifier may be used instead of the full boilerplate text. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * PCI: Add SPDX GPL-2.0 when no license was specifiedBjorn Helgaas2018-01-264-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") added SPDX GPL-2.0 to several PCI files that previously contained no license information. Add SPDX GPL-2.0 to all other PCI files that did not contain any license information and hence were under the default GPL version 2 license of the kernel. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge remote-tracking branch 'lorenzo/pci/endpoint' into nextBjorn Helgaas2018-02-013-21/+12
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * lorenzo/pci/endpoint: PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() PCI: designware-ep: Fix ->get_msi() to check MSI_EN bit PCI: endpoint: Fix find_first_zero_bit() usage PCI: endpoint: Populate func_no before calling pci_epc_add_epf() PCI: designware-ep: Fix find_first_zero_bit() usage
| * | PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent()Kishon Vijay Abraham I2018-01-112-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 723288836628 ("of: restrict DMA configuration"), of_dma_configure() doesn't configure the coherent_dma_mask/dma_mask of endpoint function device (since it doesn't have a DT node associated with and hence no dma-ranges property), resulting in dma_alloc_coherent() (used in pci_epf_alloc_space()) to fail. Fix it by making dma_alloc_coherent() use EPC's device for allocating memory address. Link: http://lkml.kernel.org/r/64d63468-d28f-8fcd-a6f3-cf2a6401c8cb@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [lorenzo.pieralisi@arm.com: tweaked commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Rob Herring <robh@kernel.org> Cc: Christoph Hellwig <hch@lst.de> Tested-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Tested-by: Niklas Cassel <niklas.cassel@axis.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
| * | PCI: endpoint: Fix find_first_zero_bit() usageNiklas Cassel2017-12-191-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | find_first_zero_bit()'s parameter 'size' is defined in bits, not in bytes. Calling find_first_zero_bit() with the wrong size unit will lead to insidious bugs. Fix this by calling find_first_zero_bit() with size BITS_PER_LONG, rather than sizeof() and add missing find_first_zero_bit() return handling. Fixes: d74679911610 ("PCI: endpoint: Introduce configfs entry for configuring EP functions") Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | PCI: endpoint: Populate func_no before calling pci_epc_add_epf()Niklas Cassel2017-12-191-8/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | func_no is a member of struct pci_epf. Since struct pci_epf is used as an argument to pci_epc_add_epf() (to bind an endpoint function to a controller), struct pci_epf.func_no should be populated before calling pci_epc_add_epf(). Initialize the struct pci_epf.func_no member before calling pci_epc_add_epf(), to fix the endpoint function binding to an endpoint controller. Fixes: d74679911610 ("PCI: endpoint: Introduce configfs entry for configuring EP functions") Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> [lorenzo.pieralisi@arm.com: rewrote the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Suggested-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* | PCI: endpoint: Fix EPF device name to support multi-function devicesCyrille Pitchen2018-01-311-2/+44
| | | | | | | | | | | | | | | | Fix the pci_epf_make() function so it can now bind many EPF devices to the same EPF driver. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
* | PCI: endpoint: Add the function number as argument to EPC opsCyrille Pitchen2018-01-312-44/+59
|/ | | | | | | | This patch updates the prototype of most handlers from 'struct pci_epc_ops' so the EPC library can now support multi-function devices. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
* PCI: endpoint: make config_item_type constBhumika Goyal2017-10-191-6/+6
| | | | | | | | | | | | Make config_item_type structures const as they are either passed to a function having the argument as const or stored in the const "ci_type" field of a config_item structure. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
* PCI: endpoint: Use correct "end of test" interruptJohn Keeping2017-09-201-7/+6
| | | | | | | | | | | | | | | pci_epf_test_raise_irq() reads the interrupt to use for the response from reg->command, but this has been cleared at the beginning of the command handler so the value is always zero at this point. Instead, extract the interrupt index before handling the command and then pass the requested interrupt into pci_epf_test_raise_irq(). This allows us to remove the specific code to extract the interrupt for COMMAND_RAISE_MSI_IRQ since it is now handled in common code. Fixes: 3ecf3232c54c ("PCI: endpoint: Do not reset *command* inadvertently") Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge branch 'pci/misc' into nextBjorn Helgaas2017-09-071-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | * pci/misc: PCI: Fix PCIe capability sizes PCI: Convert to using %pOF instead of full_name() PCI: Constify endpoint pci_epf_type device_type PCI: Constify bin_attribute structures PCI: Constify hotplug pci_device_id structures PCI: Constify hotplug attribute_group structures PCI: Constify label attribute_group structures PCI: Constify sysfs attribute_group structures
| * PCI: Constify endpoint pci_epf_type device_typeBhumika Goyal2017-08-241-2/+2
| | | | | | | | | | | | | | Make this const as it is only stored in the type field of a device structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Remove the ->remove() callbackShawn Lin2017-08-291-9/+0
| | | | | | | | | | | | | | | | | | epf_test is allocated using devm_kzalloc(). Hence it's not required to explicitly free it in remove() callback. Since ->remove() callback doesn't do anything other than freeing epf_test, remove the ->remove() callback. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Add support to poll early for host commandsKishon Vijay Abraham I2017-08-291-1/+11
| | | | | | | | | | | | | | | | Certain platforms like TI's K2G doesn't support link-up notification. Add support to poll early (without waiting for the linkup notification) for commands from the host. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Add support to use _any_ BAR to map PCI_ENDPOINT_TEST regsKishon Vijay Abraham I2017-08-291-18/+42
| | | | | | | | | | | | | | | | | | | | pci_epf_test always maps the PCI_ENDPOINT_TEST registers to BAR_0. But if BAR_0 is reserved for some other purpose (like in TI's K2G BAR_0 is mapped to application registers and cannot be used to map any other regions), PCI_ENDPOINT_TEST registers cannot be mapped making pci_epf_test unusable. Add support to use any BAR to map PCI_ENDPOINT_TEST registers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Do not reset *command* inadvertentlyKishon Vijay Abraham I2017-08-291-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_epf_test_cmd_handler() is the delayed work function which reads *command* (set by the host) and performs various actions requested by the host periodically. If the value in *command* is '0', it goes to the reset_handler where it resets *command* to '0' and queues pci_epf_test_cmd_handler(). However if the host writes a value to the *command* just after the pci-epf-test driver checks *command* for '0' and before the control goes to reset_handler, the *command* will be reset to '0' and the pci-epf-test driver won't be able to perform the actions requested by the host. Fix it here by not resetting the *command* in the reset_handler. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Add "volatile" to pci_epf_test_regKishon Vijay Abraham I2017-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | struct pci_epf_test_reg is the MEMSPACE of pci-epf-test function driver that will be accessed by the "host" for programming the pci-epf-test device. So this structure shouldn't be subjected to compiler optimization in pci_epf_test_cmd_handler() since the values can be changed by code outside the scope of current code at any time. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Add support for configurable page sizeKishon Vijay Abraham I2017-08-291-9/+50
| | | | | | | | | | | | | | | | | | | | | | pci-epc-mem uses a page size equal to *PAGE_SIZE* (usually 4KB) to manage the address space. However certain platforms like TI's K2G have a restriction that this address space should be either divided into 1MB/2MB/4MB or 8MB sizes (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). Add support to handle different page sizes here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Make ->remove() callback optionalKishon Vijay Abraham I2017-08-291-2/+3
| | | | | | | | | | | | | | Make ->remove() callback optional so that endpoint function drivers don't have to populate empty ->remove() callback functions. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Add an API to get matching "pci_epf_device_id"Kishon Vijay Abraham I2017-08-181-0/+16
| | | | | | | | | | | | | | | | | | | | Add an API to get "pci_epf_device_id" matching the EPF name. This can be used by the EPF driver to get the driver data corresponding to the EPF device name. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [bhelgaas: folded in "while" loop termination fix from Colin Ian King <colin.king@canonical.com>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: endpoint: Use of_dma_configure() to set initial DMA maskKishon Vijay Abraham I2017-08-181-2/+9
|/ | | | | | | | | Use of_dma_configure() to set the initial DMA mask of EPF device. This helps to get rid of "Coherent DMA mask 0x0 (pfn 0x0-0x1) covers a smaller range of system memory than the DMA zone pfn" warning in certain platforms like TI's K2G resulting in coherent DMA mask not being set. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: endpoint: Select CRC32 to fix test build errorRandy Dunlap2017-06-121-0/+1
| | | | | | | | | | | | | The PCI endpoint test driver uses crc32_le() so it should select CRC32. Fixes this build error (when CRC32=m): drivers/built-in.o: In function `pci_epf_test_cmd_handler': pci-epf-test.c:(.text+0x2d98d): undefined reference to `crc32_le' Fixes: 349e7a85b25f ("PCI: endpoint: functions: Add an EP function to test PCI") Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* PCI: endpoint: Make PCI_ENDPOINT depend on HAS_DMAGeert Uytterhoeven2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | If NO_DMA=y: drivers/built-in.o: In function `__pci_epc_create': (.text+0xef4e): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epc_add_epf': (.text+0xf676): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epf_alloc_space': (.text+0xfa32): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epf_free_space': (.text+0xfac4): undefined reference to `bad_dma_ops' Add a dependency on HAS_DMA to fix this. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: endpoint: functions: Add an EP function to test PCIKishon Vijay Abraham I2017-04-115-1/+530
| | | | | | | | | Adds a new endpoint function driver (to program the virtual test device) making use of the EP-core library. [bhelgaas: fold in pci_epf_test_probe() -ENOMEM test from Wei Yongjun <weiyongjun1@huawei.com>] Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: endpoint: Create configfs entry for EPC device and EPF driverKishon Vijay Abraham I2017-04-112-0/+8
| | | | | | | | Invoke APIs provided by pci-ep-cfs to create configfs entry for every EPC device and EPF driver to help users in creating EPF device and binding the EPF device to the EPC device. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: endpoint: Introduce configfs entry for configuring EP functionsKishon Vijay Abraham I2017-04-113-0/+519
| | | | | | | | Introduce a new configfs entry to configure the EP function (like configuring the standard configuration header entries) and to bind the EP function with EP controller. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: endpoint: Add EP core layer to enable EP controller and EP functionsKishon Vijay Abraham I2017-04-115-0/+1100
Introduce a new EP core layer in order to support endpoint functions in linux kernel. This comprises the EPC library (Endpoint Controller Library) and EPF library (Endpoint Function Library). EPC library implements functions specific to an endpoint controller and EPF library implements functions specific to an endpoint function. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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