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| author | Lucas Stach <l.stach@pengutronix.de> | 2021-07-17 00:04:12 +0200 |
|---|---|---|
| committer | Lucas Stach <l.stach@pengutronix.de> | 2021-07-21 22:26:09 +0200 |
| commit | c129cb3e18c28d10cbcb000842ce398c3a37d17e (patch) | |
| tree | 2845652d50684708c18282aa9039f77c2ff0b140 | |
| parent | c29ddd56150274f9a428705fd61f78e48cd1f0ec (diff) | |
| download | linux-c129cb3e18c28d10cbcb000842ce398c3a37d17e.tar.gz linux-c129cb3e18c28d10cbcb000842ce398c3a37d17e.tar.xz | |
arm64: dts: imx8mm: add DISP blk-ctrl
Add the DT node for the DISP blk-ctrl. With this in place the
display/mipi power domains are fully functional.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index fdca74ece767..72688c578b3f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1050,6 +1050,33 @@ #size-cells = <1>; ranges = <0x32c00000 0x32c00000 0x400000>; + disp_blk_ctrl: blk-ctrl@32e28000 { + compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon"; + reg = <0x32e28000 0x100>; + power-domains = <&pgc_dispmix>, <&pgc_dispmix>, + <&pgc_dispmix>, <&pgc_mipi>, + <&pgc_mipi>; + power-domain-names = "bus", "csi-bridge", + "lcdif", "mipi-dsi", + "mipi-csi"; + clocks = <&clk IMX8MM_CLK_DISP_AXI_ROOT>, + <&clk IMX8MM_CLK_DISP_APB_ROOT>, + <&clk IMX8MM_CLK_CSI1_ROOT>, + <&clk IMX8MM_CLK_DISP_AXI_ROOT>, + <&clk IMX8MM_CLK_DISP_APB_ROOT>, + <&clk IMX8MM_CLK_DISP_ROOT>, + <&clk IMX8MM_CLK_DSI_CORE>, + <&clk IMX8MM_CLK_DSI_PHY_REF>, + <&clk IMX8MM_CLK_CSI1_CORE>, + <&clk IMX8MM_CLK_CSI1_PHY_REF>; + clock-names = "csi-bridge-axi","csi-bridge-apb", + "csi-bridge-core", "lcdif-axi", + "lcdif-apb", "lcdif-pix", + "dsi-pclk", "dsi-ref", + "csi-aclk", "csi-pclk"; + #power-domain-cells = <1>; + }; + usbotg1: usb@32e40000 { compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; reg = <0x32e40000 0x200>; |