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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-25 12:29:59 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2017-01-30 13:47:37 +0000
commit8f36ebaf21fdae99c091c67e8b6fab33969f2667 (patch)
tree19f178720ef8382deb6247a6b4c5c388fe479799 /arch/arm64/include
parente363e05e12d76b3311618d442ad545dff4d08728 (diff)
downloadlinux-8f36ebaf21fdae99c091c67e8b6fab33969f2667.tar.gz
linux-8f36ebaf21fdae99c091c67e8b6fab33969f2667.tar.xz
arm/arm64: KVM: Enforce unconditional flush to PoC when mapping to stage-2
When we fault in a page, we flush it to the PoC (Point of Coherency) if the faulting vcpu has its own caches off, so that it can observe the page we just brought it. But if the vcpu has its caches on, we skip that step. Bad things happen when *another* vcpu tries to access that page with its own caches disabled. At that point, there is no garantee that the data has made it to the PoC, and we access stale data. The obvious fix is to always flush to PoC when a page is faulted in, no matter what the state of the vcpu is. Cc: stable@vger.kernel.org Fixes: 2d58b733c876 ("arm64: KVM: force cache clean on page fault when caches are off") Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r--arch/arm64/include/asm/kvm_mmu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index 6f72fe8b0e3e..6d22017ebbad 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -241,8 +241,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
{
void *va = page_address(pfn_to_page(pfn));
- if (!vcpu_has_cache_enabled(vcpu) || ipa_uncached)
- kvm_flush_dcache_to_poc(va, size);
+ kvm_flush_dcache_to_poc(va, size);
if (!icache_is_aliasing()) { /* PIPT */
flush_icache_range((unsigned long)va,