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| author | Robert Richter <rrichter@cavium.com> | 2017-01-13 14:12:09 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2017-01-13 13:15:52 +0000 |
| commit | fa5ce3d1928c441c3d241c34a00c07c8f5880b1a (patch) | |
| tree | c68dfdc1a82d2e7c8d0688e193adc1c2d7a1e7ed /arch/arm64/include | |
| parent | eac8017f0c4719d30f89d1a247de7bfbf6d0da4f (diff) | |
| download | linux-fa5ce3d1928c441c3d241c34a00c07c8f5880b1a.tar.gz linux-fa5ce3d1928c441c3d241c34a00c07c8f5880b1a.tar.xz | |
arm64: errata: Provide macro for major and minor cpu revisions
Definition of cpu ranges are hard to read if the cpu variant is not
zero. Provide MIDR_CPU_VAR_REV() macro to describe the full hardware
revision of a cpu including variant and (minor) revision.
Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/cputype.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 26a68ddb11c1..5196f0afaabd 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -56,6 +56,9 @@ (0xf << MIDR_ARCHITECTURE_SHIFT) | \ ((partnum) << MIDR_PARTNUM_SHIFT)) +#define MIDR_CPU_VAR_REV(var, rev) \ + (((var) << MIDR_VARIANT_SHIFT) | (rev)) + #define MIDR_CPU_MODEL_MASK (MIDR_IMPLEMENTOR_MASK | MIDR_PARTNUM_MASK | \ MIDR_ARCHITECTURE_MASK) |