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| author | James Hogan <james.hogan@imgtec.com> | 2013-03-07 17:20:53 +0000 |
|---|---|---|
| committer | James Hogan <james.hogan@imgtec.com> | 2013-03-15 13:21:17 +0000 |
| commit | 9e7129630329d50b8e8c3403bb71c85a7c3cbe35 (patch) | |
| tree | f925f533798f07d975abebb2c27df4380ad12afd /arch/metag/kernel/head.S | |
| parent | 00e6c92304ce38ff48029471c929d31a25e5cf10 (diff) | |
| download | linux-9e7129630329d50b8e8c3403bb71c85a7c3cbe35.tar.gz linux-9e7129630329d50b8e8c3403bb71c85a7c3cbe35.tar.xz | |
metag: smp: copy cache partition and enable GCOn
When starting an SMP hardware thread, copy the cache partition
configuration so that the threads share the same cache partitions. Also
enable the GCOn bit if running in the local half of the virtual address
space to enable coherency of shared local cache partitions. An atomic
unlock system event is executed by the new cpu before any memory is read
to ensure that any writes made by the boot cpu prior to full coherency
taking effect are visible to the new cpu.
This is to allow SMP to work even when the bootloader hasn't configured
the caches for coherency. A log message is printed to describe the cache
partition changes so that the user is aware of potential unintentional
cache wastage if they've configured the cache partitions in the wrong
way.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Diffstat (limited to 'arch/metag/kernel/head.S')
| -rw-r--r-- | arch/metag/kernel/head.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/metag/kernel/head.S b/arch/metag/kernel/head.S index 969dffabc03a..713f71d1bdfe 100644 --- a/arch/metag/kernel/head.S +++ b/arch/metag/kernel/head.S @@ -1,6 +1,7 @@ ! Copyright 2005,2006,2007,2009 Imagination Technologies #include <linux/init.h> +#include <asm/metag_mem.h> #include <generated/asm-offsets.h> #undef __exit @@ -48,6 +49,13 @@ __exit: .global _secondary_startup .type _secondary_startup,function _secondary_startup: +#if CONFIG_PAGE_OFFSET < LINGLOBAL_BASE + ! In case GCOn has just been turned on we need to fence any writes that + ! the boot thread might have performed prior to coherency taking effect. + MOVT D0Re0,#HI(LINSYSEVENT_WR_ATOMIC_UNLOCK) + MOV D1Re0,#0 + SETD [D0Re0], D1Re0 +#endif MOVT A0StP,#HI(_secondary_data_stack) ADD A0StP,A0StP,#LO(_secondary_data_stack) GETD A0StP,[A0StP] |