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authorFlorian Fainelli <florian@openwrt.org>2011-05-13 17:41:21 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-05-18 14:18:27 +0100
commit3e9957b4866f3767f19bf0e543b322ad7906c564 (patch)
treed0d7cde936ef0e211b1a452b8455cdee6f42f4b2 /arch/mips/ar7
parent10423c91ffc8e59d4f99d401f7beb3115cdc117a (diff)
downloadlinux-3e9957b4866f3767f19bf0e543b322ad7906c564.tar.gz
linux-3e9957b4866f3767f19bf0e543b322ad7906c564.tar.xz
MIPS: AR7: Fix GPIO register size for Titan variant.
The 'size' variable contains the correct register size for both AR7 and Titan, but we never used it to ioremap the correct register size. This problem only shows up on Titan. [ralf@linux-mips.org: Fixed the fix. The original patch as in patchwork recognizes the problem correctly then fails to fix it ...] Reported-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/2380/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ar7')
-rw-r--r--arch/mips/ar7/gpio.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
index 425dfa5d6e12..bb571bcdb8f2 100644
--- a/arch/mips/ar7/gpio.c
+++ b/arch/mips/ar7/gpio.c
@@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
size = 0x1f;
}
- gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
- AR7_REGS_GPIO + 0x10);
-
+ gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
if (!gpch->regs) {
printk(KERN_ERR "%s: failed to ioremap regs\n",
gpch->chip.label);