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| author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-13 23:37:38 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:42 +1000 |
| commit | f3867f439fd610db0cbcf1bb739001e95b7b25c6 (patch) | |
| tree | c3421012674292cf01d94f66c14e72d9272ad424 /drivers/gpu/drm/nouveau/dispnv04 | |
| parent | c39f472e9f14e49a9bc091977ced0ec45fc00c57 (diff) | |
| download | linux-f3867f439fd610db0cbcf1bb739001e95b7b25c6.tar.gz linux-f3867f439fd610db0cbcf1bb739001e95b7b25c6.tar.xz | |
drm/nouveau/clk: rename from clock (no binary change)
Rename to match the Linux subsystem responsible for the same kind of
things. Will be investigating how feasible it will be to expose the
GPU clock trees with it at some point.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv04')
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv04/crtc.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv04/hw.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c index 38402ade6835..f8ddae26dfbf 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c @@ -41,7 +41,7 @@ #include "disp.h" #include <subdev/bios/pll.h> -#include <subdev/clock.h> +#include <subdev/clk.h> static int nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, @@ -113,7 +113,7 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod struct drm_device *dev = crtc->dev; struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_bios *bios = nvkm_bios(&drm->device); - struct nouveau_clock *clk = nvkm_clock(&drm->device); + struct nouveau_clk *clk = nvkm_clk(&drm->device); struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index]; diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c index 3d4c19300768..f9491f926c14 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/hw.c +++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c @@ -253,7 +253,7 @@ nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head) struct nouveau_drm *drm = nouveau_drm(dev); struct nvif_device *device = &drm->device; - struct nouveau_clock *clk = nvkm_clock(device); + struct nouveau_clk *clk = nvkm_clk(device); struct nouveau_bios *bios = nvkm_bios(device); struct nvbios_pll pll_lim; struct nouveau_pll_vals pv; @@ -463,7 +463,7 @@ nv_load_state_ramdac(struct drm_device *dev, int head, struct nv04_mode_state *state) { struct nouveau_drm *drm = nouveau_drm(dev); - struct nouveau_clock *clk = nvkm_clock(&drm->device); + struct nouveau_clk *clk = nvkm_clk(&drm->device); struct nv04_crtc_reg *regp = &state->crtc_reg[head]; uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF; int i; |