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-rw-r--r--drivers/gpu/drm/i915/i915_drv.h4
-rw-r--r--drivers/gpu/drm/i915/i915_gpu_error.c2
-rw-r--r--drivers/gpu/drm/i915/i915_pci.c27
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c20
4 files changed, 30 insertions, 23 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fcba6fe3caaf..755799e06a21 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -639,7 +639,7 @@ struct intel_csr {
func(is_i915g) sep \
func(is_i945gm) sep \
func(is_g33) sep \
- func(need_gfx_hws) sep \
+ func(hws_needs_physical) sep \
func(is_g4x) sep \
func(is_pineview) sep \
func(is_broadwater) sep \
@@ -2748,7 +2748,7 @@ struct drm_i915_cmd_table {
#define HAS_EDRAM(dev) (!!(__I915__(dev)->edram_cap & EDRAM_ENABLED))
#define HAS_WT(dev) ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && \
HAS_EDRAM(dev))
-#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
+#define HWS_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->hws_needs_physical)
#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->has_hw_contexts)
#define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->has_logical_ring_contexts)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index d45a959b7c53..334f15df7c8d 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1025,7 +1025,7 @@ static void error_record_engine_registers(struct drm_i915_error_state *error,
if (INTEL_GEN(dev_priv) > 2)
ee->mode = I915_READ_MODE(engine);
- if (I915_NEED_GFX_HWS(dev_priv)) {
+ if (!HWS_NEEDS_PHYSICAL(dev_priv)) {
i915_reg_t mmio;
if (IS_GEN7(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0f1eb4a5153d..05603b151acd 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -58,6 +58,7 @@
.gen = 2, .num_pipes = 1, \
.has_overlay = 1, .overlay_needs_physical = 1, \
.has_gmch_display = 1, \
+ .hws_needs_physical = 1, \
.ring_mask = RENDER_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
CURSOR_OFFSETS
@@ -95,6 +96,7 @@ static const struct intel_device_info intel_i915g_info = {
GEN3_FEATURES,
.is_i915g = 1, .cursor_needs_physical = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
+ .hws_needs_physical = 1,
};
static const struct intel_device_info intel_i915gm_info = {
GEN3_FEATURES,
@@ -103,11 +105,13 @@ static const struct intel_device_info intel_i915gm_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.supports_tv = 1,
.has_fbc = 1,
+ .hws_needs_physical = 1,
};
static const struct intel_device_info intel_i945g_info = {
GEN3_FEATURES,
.has_hotplug = 1, .cursor_needs_physical = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
+ .hws_needs_physical = 1,
};
static const struct intel_device_info intel_i945gm_info = {
GEN3_FEATURES,
@@ -116,6 +120,7 @@ static const struct intel_device_info intel_i945gm_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.supports_tv = 1,
.has_fbc = 1,
+ .hws_needs_physical = 1,
};
#define GEN4_FEATURES \
@@ -130,6 +135,7 @@ static const struct intel_device_info intel_i965g_info = {
GEN4_FEATURES,
.is_broadwater = 1,
.has_overlay = 1,
+ .hws_needs_physical = 1,
};
static const struct intel_device_info intel_i965gm_info = {
@@ -138,18 +144,19 @@ static const struct intel_device_info intel_i965gm_info = {
.is_mobile = 1, .has_fbc = 1,
.has_overlay = 1,
.supports_tv = 1,
+ .hws_needs_physical = 1,
};
static const struct intel_device_info intel_g33_info = {
GEN3_FEATURES,
.is_g33 = 1,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .has_hotplug = 1,
.has_overlay = 1,
};
static const struct intel_device_info intel_g45_info = {
GEN4_FEATURES,
- .is_g4x = 1, .need_gfx_hws = 1,
+ .is_g4x = 1,
.has_pipe_cxsr = 1,
.ring_mask = RENDER_RING | BSD_RING,
};
@@ -157,7 +164,7 @@ static const struct intel_device_info intel_g45_info = {
static const struct intel_device_info intel_gm45_info = {
GEN4_FEATURES,
.is_g4x = 1,
- .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
+ .is_mobile = 1, .has_fbc = 1,
.has_pipe_cxsr = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING | BSD_RING,
@@ -166,13 +173,13 @@ static const struct intel_device_info intel_gm45_info = {
static const struct intel_device_info intel_pineview_info = {
GEN3_FEATURES,
.is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .has_hotplug = 1,
.has_overlay = 1,
};
#define GEN5_FEATURES \
.gen = 5, .num_pipes = 2, \
- .need_gfx_hws = 1, .has_hotplug = 1, \
+ .has_hotplug = 1, \
.has_gmbus_irq = 1, \
.ring_mask = RENDER_RING | BSD_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
@@ -189,7 +196,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
#define GEN6_FEATURES \
.gen = 6, .num_pipes = 2, \
- .need_gfx_hws = 1, .has_hotplug = 1, \
+ .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.has_llc = 1, \
@@ -211,7 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
- .need_gfx_hws = 1, .has_hotplug = 1, \
+ .has_hotplug = 1, \
.has_fbc = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.has_llc = 1, \
@@ -250,7 +257,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
.has_gmbus_irq = 1, \
.has_hw_contexts = 1, \
.has_gmch_display = 1, \
- .need_gfx_hws = 1, .has_hotplug = 1, \
+ .has_hotplug = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.display_mmio_offset = VLV_DISPLAY_BASE, \
GEN_DEFAULT_PIPEOFFSETS, \
@@ -298,7 +305,7 @@ static const struct intel_device_info intel_broadwell_gt3_info = {
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.is_cherryview = 1,
.has_psr = 1,
@@ -333,7 +340,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
static const struct intel_device_info intel_broxton_info = {
.is_broxton = 1,
.gen = 9,
- .need_gfx_hws = 1, .has_hotplug = 1,
+ .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_pipes = 3,
.has_ddi = 1,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4472752812cb..fd8fcc6ec970 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -559,10 +559,10 @@ static int init_ring_common(struct intel_engine_cs *engine)
}
}
- if (I915_NEED_GFX_HWS(dev_priv))
- intel_ring_setup_status_page(engine);
- else
+ if (HWS_NEEDS_PHYSICAL(dev_priv))
ring_setup_phys_status_page(engine);
+ else
+ intel_ring_setup_status_page(engine);
/* Enforce ordering by reading HEAD register back */
I915_READ_HEAD(engine);
@@ -2109,13 +2109,13 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine)
goto error;
}
- if (I915_NEED_GFX_HWS(dev_priv)) {
- ret = init_status_page(engine);
+ if (HWS_NEEDS_PHYSICAL(dev_priv)) {
+ WARN_ON(engine->id != RCS);
+ ret = init_phys_status_page(engine);
if (ret)
goto error;
} else {
- WARN_ON(engine->id != RCS);
- ret = init_phys_status_page(engine);
+ ret = init_status_page(engine);
if (ret)
goto error;
}
@@ -2155,11 +2155,11 @@ void intel_engine_cleanup(struct intel_engine_cs *engine)
if (engine->cleanup)
engine->cleanup(engine);
- if (I915_NEED_GFX_HWS(dev_priv)) {
- cleanup_status_page(engine);
- } else {
+ if (HWS_NEEDS_PHYSICAL(dev_priv)) {
WARN_ON(engine->id != RCS);
cleanup_phys_status_page(engine);
+ } else {
+ cleanup_status_page(engine);
}
intel_engine_cleanup_common(engine);
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-23 13:51:00 +0000