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* ARCv2: perf: Finally introduce HS perf unitVineet Gupta2015-08-271-1/+4
* ARCv2: perf: implement exclusion of event counting in user or kernel modeAlexey Brodkin2015-08-271-0/+3
* ARCv2: perf: Support sampling events using overflow interruptsAlexey Brodkin2015-08-271-2/+6
* ARC: perf: cap the number of counters to hardware max of 32Vineet Gupta2015-08-271-2/+3
* ARC: add/fix some comments in code - no functional changeVineet Gupta2015-08-202-12/+12
* ARC: change some branchs to jumps to resolve linkage errorsYuriy Kolerov2015-08-201-3/+3
* ARC: ensure futex ops are atomic in !LLSC configVineet Gupta2015-08-201-0/+12
* ARC: make futex_atomic_cmpxchg_inatomic() return bimodalVineet Gupta2015-08-201-9/+11
* ARC: futex cosmeticsVineet Gupta2015-08-201-8/+9
* ARC: add barriers to futex codeVineet Gupta2015-08-201-11/+10
* ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin2015-08-202-0/+9
* ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoffVineet Gupta2015-08-072-4/+2
* ARC: Make pt_regs regs unsignedVineet Gupta2015-08-052-37/+37
* ARCv2: spinlock/rwlock: Reset retry delay when starting a new spin-wait cycleVineet Gupta2015-08-041-3/+3
* ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponentia...Vineet Gupta2015-08-042-4/+338
* ARC: LLOCK/SCOND based rwlockVineet Gupta2015-08-042-10/+166
* ARC: LLOCK/SCOND based spin_lockVineet Gupta2015-08-041-7/+69
* ARC: refactor atomic inline asm operands with symbolic namesVineet Gupta2015-08-041-15/+17
* Revert "ARCv2: STAR 9000837815 workaround hardware exclusive transactions liv...Vineet Gupta2015-08-041-12/+2
* ARCv2: Fix the peripheral address space detectionVineet Gupta2015-08-031-4/+3
* mm: clean up per architecture MM hook header filesLaurent Dufour2015-07-172-15/+1
* ARC: make sure instruction_pointer() returns unsigned valueAlexey Brodkin2015-07-131-1/+1
* ARC: Add llock/scond to futex backendVineet Gupta2015-07-091-6/+42
* ARC: Make ARC bitops "safer" (add anti-optimization)Vineet Gupta2015-07-091-26/+9
* Merge branch 'akpm' (patches from Andrew)Linus Torvalds2015-07-011-5/+7
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| * arc: use for_each_sg()Akinobu Mita2015-06-301-5/+7
* | Merge tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgup...Linus Torvalds2015-07-0128-928/+1502
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| * ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)Vineet Gupta2015-06-251-0/+11
| * ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelockVineet Gupta2015-06-251-2/+12
| * ARC: Reduce bitops lines of code using macrosVineet Gupta2015-06-251-333/+144
| * ARCv2: barriersVineet Gupta2015-06-253-4/+87
| * ARC: add smp barriers around atomics per Documentation/atomic_ops.txtVineet Gupta2015-06-254-0/+89
| * ARC: add compiler barrier to LLSC based cmpxchgVineet Gupta2015-06-251-4/+5
| * ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta2015-06-221-0/+3
| * ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta2015-06-222-0/+92
| * ARCv2: Adhere to Zero Delay loop restrictionVineet Gupta2015-06-222-14/+12
| * ARCv2: MMUv4: support aliasing icache configVineet Gupta2015-06-221-3/+1
| * ARCv2: MMUv4: cache programming model changesVineet Gupta2015-06-222-2/+6
| * ARCv2: MMUv4: TLB programming Model changesVineet Gupta2015-06-223-2/+34
| * ARCv2: STAR 9000814690: Really Re-enable interrupts to avoid deadlocksVineet Gupta2015-06-221-0/+5
| * ARCv2: STAR 9000808988: signals involving Delay SlotVineet Gupta2015-06-221-7/+10
| * ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta2015-06-2211-4/+377
| * ARCv2: [intc] HS38 core interrupt controllerVineet Gupta2015-06-222-0/+117
| * ARC: uncached base is hard constant for ARC, don't save itVineet Gupta2015-06-221-1/+0
| * ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-193-166/+184
| * ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STKVineet Gupta2015-06-191-36/+35
| * ARC: entry.S: micro-optimize Trap handlerVineet Gupta2015-06-191-2/+3
| * ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta2015-06-192-297/+309
| * ARC: entry.S: FAKE_RET_FROM_EXCPN can always use r9Vineet Gupta2015-06-191-8/+8
| * ARC: entry.S: canonical'ize EXCEPTION_{PROLOGUE,EPILOGUE}Vineet Gupta2015-06-191-16/+1
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