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* ARM: imx: mach-imx6q: Fix the PHY ID mask for AR8031Fabio Estevam2016-10-241-1/+1
| | | | | | | | | | AR8031 and AR8035 have the same PHY ID mask of 0xffffffef. So fix it and make it match with the PHY ID mask definition at drivers/net/phy/at803x.c. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2016-08-011-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Improved and new platform support for various SoCs: New SoC support: - Broadcom BCM23550 - Freescale i.MX7Solo - Qualcomm MDM9615 - Renesas r8a7792 Improvements: - convert clps711x to multiplatform - debug uart improvements for Atmel platforms - Tango platform improvements: HOTPLUG_CPU, Suspend-to-ram - OMAP tweaks and improvements to hwmod - OMAP support for kexec on SMP" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits) ARM: davinci: fix build break because of undeclared dm365_evm_snd_data ARM: s3c64xx: smartq: Avoid sparse warnings ARM: sti: Implement dummy L2 cache's write_sec ARM: STi: Update machine _namestr to be more generic. arm: meson: explicitly select clk drivers ARM: tango: add Suspend-to-RAM support ARM: hisi: consolidate the hisilicon machine entries ARM: tango: fix CONFIG_HOTPLUG_CPU=n build MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry MAINTAINERS: Update BCM63XX entry MAINTAINERS: Add NS2 entry MAINTAINERS: Fix nsp false-positives MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs ARM: clps711x: Switch to MULTIPLATFORM ARM: clps711x: Remove boards support ARM: clps711x: Add basic DT support ARM: clps711x: Reduce static map size ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu ARM: oxnas: Change OX810SE default driver config ...
| * ARM: mach-imx6q: fix spelling mistake in error messageJean Guyomarc'h2016-06-101-1/+1
| | | | | | | | | | | | | | | | The compatible device tree node that is searched for is imx6q-iomuxc-gpr but was misspelled imx6q-iomux-gpr in the error handling message. Signed-off-by: Jean Guyomarc'h <jean.guyomarch@openwide.fr> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | Merge tag 'armsoc-cleanup' of ↵Linus Torvalds2016-08-011-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "The cleanup branch keeps going down in size as we've completed a lot of the major legacy platform removals and conversions. A handful of changes this time around, some of the themes or larger sets are: - A bunch of i.MX cleanups around platform detection, init call cleanups - Misc fixes of missing/implicit includes - Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits) ARM: mps2: fix typo ARM: s3c64xx: avoid warning about 'struct device_node' bus: mvebu-mbus: make mvebu_mbus_syscore_ops static bus: mvebu-mbus: fix __iomem on register pointers ARM: tegra: Remove board_init_funcs array ARM: iop: Fix indentation ARM: imx: remove cpu_is_mx*() ARM: imx: remove last call to cpu_is_mx5* ARM: imx: rework mx27_pm_init() call ARM: imx: deconstruct mx3_idle ARM: imx: deconstruct mxc_rnga initialization ARM: imx: remove cpu_is_mx1 check ARM: i.MX: Do not explicitly call l2x0_of_init() ARM: i.MX: system.c: Tweak prefetch settings for performance ARM: i.MX: system.c: Replace magic numbers ARM: i.MX: system.c: Remove redundant errata 752271 code ARM: i.MX: system.c: Convert goto to if statement ARM: Kirkwood: fix kirkwood_pm_init() declaration/type ARM: Kirkwood: make kirkwood_disable_mbus_error_propagation() static ARM: orion5x: make orion5x_legacy_handle_irq static ...
| * | ARM: i.MX: Do not explicitly call l2x0_of_init()Andrey Smirnov2016-06-211-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | There's no need to explicitly call l2x0_of_init() since it will be called as a part of init_IRQ() (see arch/arm/kernel/irq.c for details). This way we can simplify imx_init_l2cache() and ditch the call to it on i.MX35 (which does not claim compatibility with "arm,pl310-cache") alltogether. Acked-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* / arm: use of_platform_default_populate() to populateKefeng Wang2016-06-231-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | Use helper of_platform_default_populate() in linux/of_platform when possible, instead of calling of_platform_populate() with the default match table. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Krzysztof Halasa <khalasa@piap.pl> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ray Jui <rjui@broadcom.com> Cc: Viresh Kumar <vireshk@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Rob Herring <robh@kernel.org> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org>
* ARM: imx: Add msl code support for imx6qpBai Ping2016-02-141-2/+6
| | | | | | | | | | The i.MX6QP is a different SOC, but internally we treate it as i.MX6Q Rev_2.0 to maximum the code reusability. The chip silicon number we read from the ANADIG_DIGPROG is 0x630100. This patch add code to identify it as i.MX6QP Rev_1.0 when print out the silicon version. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* PM / OPP: Prefix exported opp routines with dev_pm_opp_Viresh Kumar2015-09-151-1/+1
| | | | | | | | | | That's the naming convention followed in most of opp core, but few routines didn't follow this, fix them. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* PM / OPP: Rename opp init/free table routinesViresh Kumar2015-09-151-1/+1
| | | | | | | | | | | | | | free-table routines are opposite of init-table ones, and must be named to make that clear. Opposite of 'init' is 'exit', but those doesn't suit really well. Replace 'init' with 'add' and 'free' with 'remove'. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlierShawn Guo2015-06-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function") moves imx6_set_lpm() from clock init function into imx6_pm_common_init(). This causes a hang when cpuidle support is enabled. The reason for that is ARM core clock is shut down unexpectedly by WAIT mode. It happens with the following call stack: cpuidle_register_governor() cpuidle_switch_governor() cpuidle_uninstall_idle_handler() synchronize_sched() wait_rcu_gp() wait_for_completion() When wait_for_completion() is called as above, all cores are idle/WFI. Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a hardware shutdown of the ARM core clock. To fix the regression, we need to ensure that CCM_CLPCR_LPM is initialized into RUN mode earlier than cpuidle governor registration, which is a postcore_initcall. This patch creates function imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into RUN mode, and have the function called from machine .init_irq hook, which should be early enough. Reported-by: Kevin Hilman <khilman@kernel.org> Fixes: 8fb76a07e2cb ("ARM: imx6: set initial power mode in pm function") Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Tyler Baker <tyler.baker@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2015-04-221-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late changes from Olof Johansson: "We were expecting to sit on this branch through most of the merge window since the contents was merged into our tree late, but we ended up sitting on all of our contents so it can go in with the rest. The contents here is: - a large branch of cleanups of the CM/PRM blocks on OMAP. - a couple of patches plumbing up CM/PRM on OMAP5 and DRA7. - a branch with DT updates for Freescale i.MX. including some shuffling from .dts to .dtsi (include) files that causes a little churn" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits) ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON ARM: OMAP4+: control: add support for initializing control module via DT ARM: dts: dra7: add minimal l4 bus layout with control module support ARM: dts: omap5: add minimal l4 bus layout with control module support ARM: OMAP4+: control: remove support for legacy pad read/write ARM: OMAP4: display: convert display to use syscon for dsi muxing ARM: dts: omap4: add minimal l4 bus layout with control module support ARM: dts: am4372: add minimal l4 bus layout with control module support ARM: dts: am43xx-epos-evm: fix pinmux node layout ARM: dts: am33xx: add minimal l4 bus layout with control module support ARM: dts: omap3: add minimal l4 bus layout with control module support ARM: dts: omap24xx: add minimal l4 bus layout with control module support ARM: OMAP2+: control: add syscon support for register accesses ARM: OMAP2+: id: cache omap_type value ARM: OMAP2+: control: remove API for getting control module base address ARM: OMAP2+: clock: add low-level support for regmap ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags ARM: OMAP2+: CM: move SoC specific init calls within a generic API ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility ...
| * ARM: imx6: Warn when an old DT is detectedMarc Zyngier2015-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GPC has been converted to be a full blown irqchip (and not a mole on the side of the GIC), booting a new kernel with an old DT is likely to result in a rough ride for the user. This patch makes sure such a situation is promptly detected and the user made aware that a DT update is in order. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: convert GPC to stacked domainsMarc Zyngier2015-03-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IMX6 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the fact that the GPC block is actually the first interrupt controller in the chain, kernels with this patch applied wont have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: fix struct clk pointer comparingShawn Guo2015-03-111-2/+3
|/ | | | | | | | | | | | | | | | | | | | | | Since commit 035a61c314eb ("clk: Make clk API return per-user struct clk instances"), clk API users can no longer check if two struct clk pointers are pointing to the same hardware clock, i.e. struct clk_hw, by simply comparing two pointers. That's because with the per-user clk change, a brand new struct clk is created whenever clients try to look up the clock by calling clk_get() or sister functions like clk_get_sys() and of_clk_get(). This changes the original behavior where the struct clk is only created for once when clock driver registers the clock to CCF in the first place. The net change here is before commit 035a61c314eb the struct clk pointer is unique for given hardware clock, while after the commit the pointers returned by clk lookup calls become different for the same hardware clock. That said, the struct clk pointer comparing in the code doesn't work any more. Call helper function clk_is_match() instead to fix the problem. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()Sebastian Andrzej Siewior2015-01-201-1/+1
| | | | | | | | | imx6q_opp_check_speed_grading() remaps memory to the base variable and never unmaps it. I can't see how this can be of any use later so here I unmap it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: clean up machine mxc_arch_reset_init_dt reset initJingchang Lu2014-11-221-3/+0
| | | | | | | | | | | | | | | System restart mechanism has been changed with the introduction of "kernel restart handler call chain support". The imx2 watchdog based restart handler has been moved to the driver, and these restart can be removed from the machine layer. This patch cleans up the device tree version machine reset init with mxc_arch_reset_init_dt and removes corresponding .restart handler, for the .init_machine that can be handled by system default after removing the mxc_arch_reset_init_dt, the .init_machine is also removed. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: mark .dt_compat as constShawn Guo2014-07-181-1/+1
| | | | | | | | Otherwise GCC will mark the .init.rodata section R/W, which causes a compile error once we add other real R/O data. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: mx6: Only check for 1.2GHz for mx6quadFabio Estevam2014-07-181-1/+1
| | | | | | | | | | | | It is only the mx6quad variant that can run up to 1.2GHz, so add the check accordingly. This avoids getting the following warning on a mx6solo: failed to disable 1.2 GHz OPP Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priorityPhilipp Zabel2014-03-051-0/+34
| | | | | | | | | | | This is needed so that the IPU framebuffer scanout cannot be starved by VPU or GPU activity. Some boards like the SabreLite and SabreSD seem to set this in the DCD already, but the documented register reset values do not contain the necessary settings. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add speed grading check for i.mx6 socAnson Huang2014-03-051-3/+23
| | | | | | | | | | | | | | | | The fuse map of speed_grading[1:0] defines the max speed of ARM, see below the definition: 2b'11: 1200000000Hz; 2b'10: 996000000Hz; 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. 2b'00: 792000000Hz; Need to remove all illegal setpoints according to fuse map. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6q: support ptp and rmii clock from padShawn Guo2014-03-051-1/+35
| | | | | | | | | | | | On imx6qdl, the ENET RMII and PTP clock can come from either internal ANATOP/CCM or external clock source through pad GPIO_16. But in case of the external clock source, bit IOMUXC_GPR1[21] needs to be cleared. The patch adds the support for systems that use an external clock source and distinguishes above two cases by checking if the PTP clock specified in device tree is the one coming from the internal ANATOP/CCM. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add suspend in ocram support for i.mx6qAnson Huang2014-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When system enter suspend, we can set the DDR IO to high-Z state to save DDR IOs' power consumption, this operation can save many power(from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6Q SabreSD board, R25) of DDR IOs. To achieve that, we need to copy the suspend code to ocram and run the low level hardware related code(set DDR IOs to high-Z state) in ocram. If there is no ocram space available, then system will still do suspend in external DDR, hence no DDR IOs will be set to high-Z. The OCRAM usage layout is as below, ocram suspend region(4K currently): ======================== high address ====================== . . . ^ ^ ^ imx6_suspend code PM_INFO structure(imx6_cpu_pm_info) ======================== low address ======================= Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge branch 'cubox-i-init' into for-linusRussell King2014-01-281-0/+35
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| * ARM: imx: initial SolidRun HummingBoard supportRussell King2014-01-271-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the SolidRun HummingBoard. This commit adds support for the following interfaces on this board: - Consumer Ir receiver - S/PDIF output - Both USB interfaces - Gigabit Ethernet using AR8035 - UART port Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: imx: use __initconst for const init definitionShawn Guo2013-12-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0-DAY kernel build testing backend reports the following. scripts/checkpatch.pl 0001-ARM-imx-add-support-code-for-IMX50-based-machines.patch # many are suggestions rather than must-fix ERROR: Use of const init definition must use __initconst #80: arch/arm/mach-imx/mach-imx50.c:26: +static const char *imx50_dt_board_compat[] __initdata = { While at it, fix the error globally for IMX platform. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: add PCI fixup for PEX860X on Gateworks boardTim Harvey2013-12-091-0/+30
|/ | | | | | | | | The PEX860X has GPIO's which are used for PCI Reset lines on the Gateworks Ventana boards. The GPIO's need to be set as output level high so as to allow the PCIe devices to come out of reset. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge tag 'pm+acpi-3.13-rc1' of ↵Linus Torvalds2013-11-141-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI and power management updates from Rafael J Wysocki: - New power capping framework and the the Intel Running Average Power Limit (RAPL) driver using it from Srinivas Pandruvada and Jacob Pan. - Addition of the in-kernel switching feature to the arm_big_little cpufreq driver from Viresh Kumar and Nicolas Pitre. - cpufreq support for iMac G5 from Aaro Koskinen. - Baytrail processors support for intel_pstate from Dirk Brandewie. - cpufreq support for Midway/ECX-2000 from Mark Langsdorf. - ARM vexpress/TC2 cpufreq support from Sudeep KarkadaNagesha. - ACPI power management support for the I2C and SPI bus types from Mika Westerberg and Lv Zheng. - cpufreq core fixes and cleanups from Viresh Kumar, Srivatsa S Bhat, Stratos Karafotis, Xiaoguang Chen, Lan Tianyu. - cpufreq drivers updates (mostly fixes and cleanups) from Viresh Kumar, Aaro Koskinen, Jungseok Lee, Sudeep KarkadaNagesha, Lukasz Majewski, Manish Badarkhe, Hans-Christian Egtvedt, Evgeny Kapaev. - intel_pstate updates from Dirk Brandewie and Adrian Huang. - ACPICA update to version 20130927 includig fixes and cleanups and some reduction of divergences between the ACPICA code in the kernel and ACPICA upstream in order to improve the automatic ACPICA patch generation process. From Bob Moore, Lv Zheng, Tomasz Nowicki, Naresh Bhat, Bjorn Helgaas, David E Box. - ACPI IPMI driver fixes and cleanups from Lv Zheng. - ACPI hotplug fixes and cleanups from Bjorn Helgaas, Toshi Kani, Zhang Yanfei, Rafael J Wysocki. - Conversion of the ACPI AC driver to the platform bus type and multiple driver fixes and cleanups related to ACPI from Zhang Rui. - ACPI processor driver fixes and cleanups from Hanjun Guo, Jiang Liu, Bartlomiej Zolnierkiewicz, Mathieu Rhéaume, Rafael J Wysocki. - Fixes and cleanups and new blacklist entries related to the ACPI video support from Aaron Lu, Felipe Contreras, Lennart Poettering, Kirill Tkhai. - cpuidle core cleanups from Viresh Kumar and Lorenzo Pieralisi. - cpuidle drivers fixes and cleanups from Daniel Lezcano, Jingoo Han, Bartlomiej Zolnierkiewicz, Prarit Bhargava. - devfreq updates from Sachin Kamat, Dan Carpenter, Manish Badarkhe. - Operation Performance Points (OPP) core updates from Nishanth Menon. - Runtime power management core fix from Rafael J Wysocki and update from Ulf Hansson. - Hibernation fixes from Aaron Lu and Rafael J Wysocki. - Device suspend/resume lockup detection mechanism from Benoit Goby. - Removal of unused proc directories created for various ACPI drivers from Lan Tianyu. - ACPI LPSS driver fix and new device IDs for the ACPI platform scan handler from Heikki Krogerus and Jarkko Nikula. - New ACPI _OSI blacklist entry for Toshiba NB100 from Levente Kurusa. - Assorted fixes and cleanups related to ACPI from Andy Shevchenko, Al Stone, Bartlomiej Zolnierkiewicz, Colin Ian King, Dan Carpenter, Felipe Contreras, Jianguo Wu, Lan Tianyu, Yinghai Lu, Mathias Krause, Liu Chuansheng. - Assorted PM fixes and cleanups from Andy Shevchenko, Thierry Reding, Jean-Christophe Plagniol-Villard. * tag 'pm+acpi-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (386 commits) cpufreq: conservative: fix requested_freq reduction issue ACPI / hotplug: Consolidate deferred execution of ACPI hotplug routines PM / runtime: Use pm_runtime_put_sync() in __device_release_driver() ACPI / event: remove unneeded NULL pointer check Revert "ACPI / video: Ignore BIOS initial backlight value for HP 250 G1" ACPI / video: Quirk initial backlight level 0 ACPI / video: Fix initial level validity test intel_pstate: skip the driver if ACPI has power mgmt option PM / hibernate: Avoid overflow in hibernate_preallocate_memory() ACPI / hotplug: Do not execute "insert in progress" _OST ACPI / hotplug: Carry out PCI root eject directly ACPI / hotplug: Merge device hot-removal routines ACPI / hotplug: Make acpi_bus_hot_remove_device() internal ACPI / hotplug: Simplify device ejection routines ACPI / hotplug: Fix handle_root_bridge_removal() ACPI / hotplug: Refuse to hot-remove all objects with disabled hotplug ACPI / scan: Start matching drivers after trying scan handlers ACPI: Remove acpi_pci_slot_init() headers from internal.h ACPI / blacklist: fix name of ThinkPad Edge E530 PowerCap: Fix build error with option -Werror=format-security ... Conflicts: arch/arm/mach-omap2/opp.c drivers/Kconfig drivers/spi/spi.c
| * PM / OPP: rename header to linux/pm_opp.hNishanth Menon2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | Since Operating Performance Points (OPP) functions are specific to device specific power management, be specific and rename opp.h to pm_opp.h Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| * PM / OPP: rename functions to dev_pm_opp*Nishanth Menon2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Operating Performance Points (OPP) functions are specific to device specific power management, be specific and rename opp_* accessors in OPP library with dev_pm_opp_* equivalent. Affected functions are: opp_get_voltage opp_get_freq opp_get_opp_count opp_find_freq_exact opp_find_freq_floor opp_find_freq_ceil opp_add opp_enable opp_disable opp_get_notifier opp_init_cpufreq_table opp_free_cpufreq_table Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | ARM: imx: replace imx6q_restart() with mxc_restart()Shawn Guo2013-10-211-32/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx6q_restart() works fine with normal reboot but will run into problem with emergency reboot like sysrq-b. In that case, of_iomap() gets called from interrupt context and hence triggers the BUG_ON in __get_vm_area_node(). Actually, since commit c1e31d1 (ARM: imx: create mxc_arch_reset_init_dt() for DT boot), imx6q/dl should try to use mxc_restart() by calling mxc_arch_reset_init_dt() beforehand, where things like of_iomap() can be done. The patch updates mxc_restart() a little bit to get it work for imx6q/dl and kill imx6q_restart() completely. Reported-by: Nathan Lynch <nathan_lynch@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx6: report soc info via soc deviceShawn Guo2013-10-211-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch enables soc bus infrastructure and adds a function imx_soc_device_init() to report soc info via soc device interface for imx6qdl and imx6sl. With the support, user space can get soc related info by looking at sysfs like below. $ cat /sys/devices/soc0/machine Freescale i.MX6 Quad SABRE Smart Device Board $ cat /sys/devices/soc0/family Freescale i.MX $ cat /sys/devices/soc0/soc_id i.MX6Q $ cat /sys/devices/soc0/revision 1.2 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: add a common function to initialize revision from anatopShawn Guo2013-10-211-24/+1
| | | | | | | | | | | | | | | | | | The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx6q: use common soc revision helpersShawn Guo2013-10-211-9/+4
| | | | | | | | | | | | | | | | It calls imx_set_soc_revision() to set up soc revision in imx6q_init_revision(), and replaces all the occurrences of imx6q_revision() with common helper imx_get_soc_revision(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | Merge remote-tracking branch 'shesselba/clk-of-init-v2_for-3.13' into imx/socShawn Guo2013-10-211-11/+3
|\ \ | |/ |/|
| * ARM: imx: remove custom .init_time hookSebastian Hesselbarth2013-09-291-11/+3
| | | | | | | | | | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* | cpufreq: imx6q-cpufreq: assign cpu_dev correctly to cpu0 deviceSudeep KarkadaNagesha2013-09-191-2/+7
|/ | | | | | | | | | | | | | | | Commit cdc58d602d2e657602a90c190cbf745886c95977 "cpufreq: imx6q-cpufreq: remove device tree parsing for cpu nodes" assumed the pdev->dev is set to cpu0 device in the platform code. But it actually points to the virtual cpufreq-cpu0 platform device which is not present in the device tree. Most of the information needed by cpufreq is stored in cpu0 DT node. So cpu_dev must point to cpu0 device. This patch fixes the wrong assignment to cpu_dev. Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Merge tag 'soc-for-linus' of ↵Linus Torvalds2013-09-061-111/+60
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "This branch contains mostly additions and changes to platform enablement and SoC-level drivers. Since there's sometimes a dependency on device-tree changes, there's also a fair amount of those in this branch. Pieces worth mentioning are: - Mbus driver for Marvell platforms, allowing kernel configuration and resource allocation of on-chip peripherals. - Enablement of the mbus infrastructure from Marvell PCI-e drivers. - Preparation of MSI support for Marvell platforms. - Addition of new PCI-e host controller driver for Tegra platforms - Some churn caused by sharing of macro names between i.MX 6Q and 6DL platforms in the device tree sources and header files. - Various suspend/PM updates for Tegra, including LP1 support. - Versatile Express support for MCPM, part of big little support. - Allwinner platform support for A20 and A31 SoCs (dual and quad Cortex-A7) - OMAP2+ support for DRA7, a new Cortex-A15-based SoC. The code that touches other architectures are patches moving MSI arch-specific functions over to weak symbols and removal of ARCH_SUPPORTS_MSI, acked by PCI maintainers" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits) tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ...
| * ARM: imx6q: remove board specific CLKO setupShawn Guo2013-08-221-69/+0
| | | | | | | | | | | | | | | | | | | | | | The CLKO is widely used by imx6q board designs to clock audio codec. Since most codecs accept 24 MHz frequency, let's initially set up CLKO with OSC24M (cko <-- cko2 <-- osc). Then those board specific CLKO setup for audio codec can be removed. The board dts files also need an update on cko reference in codec node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * phy: micrel: Add definitions for common Micrel PHY registersDinh Nguyen2013-08-221-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defines for common Micrel PHY setups so that other platforms can use them. Update imx61 and sama5 hardware to use the micrel_phy.h PHY defines. Also add support for the KSZ9021RLRN PHY. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: David S. Miller <davem@davemloft.net> CC: Andrew Victor <linux@maxim.org.za> CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: Move anatop related from board file to anatop driverPeter Chen2013-08-221-5/+0
| | | | | | | | | | | | | | Move anatop related (For USB) from board file to anatop driver Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: let L2 initialization be a common functionShawn Guo2013-08-161-36/+1
| | | | | | | | | | | | | | | | | | Move imx6q L2 initialization function imx6q_init_l2cache() into system.c, and rename it imx_init_l2cache(), so that other platforms other than imx6q can also use the function. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
| * ARM i.MX6Q: Use ENET_CLK_SEL defines in imx6q_1588_initPhilipp Zabel2013-08-161-1/+4
| | | | | | | | | | Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX6: add ethernet phy fixup for KSZ9031Sascha Hauer2013-08-161-0/+23
| | | | | | | | | | | | | | | | | | The KSZ9031 is used on the i.MX6 based Data Modul eDM-QMX6 board. It needs the same fixup to the rx/tx delays as other i.MX6 boards. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX6: add ethernet phy fixup for AR8031Sascha Hauer2013-08-161-0/+27
| | | | | | | | | | | | | | | | The AR8031 is used on the i.MX6 based sabreSD, sabreauto and wandboard. All need the same fixup, so add it for all i.MX6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX6: call ksz9021 phy fixup for all i.MX6 boardsSascha Hauer2013-08-161-4/+6
| | | | | | | | | | | | | | | | | | In current U-Boot the sabrelite, nitrogen6x and titanium all need the same fixup for the ksz9021 phy. Instead of limiting the fixup to a single board apply them for all. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | cpufreq: imx6q-cpufreq: remove device tree parsing for cpu nodesSudeep KarkadaNagesha2013-08-211-2/+1
|/ | | | | | | | | | | Now that the cpu device registration initialises the of_node(if available) appropriately for all the cpus, parsing here is redundant. This patch removes all DT parsing and uses cpu->of_node instead. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
* reboot: arm: change reboot_mode to use enum reboot_modeRobin Holt2013-07-091-1/+2
| | | | | | | | | | | | | | | | Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresdNicolin Chen2013-06-171-0/+42
| | | | | | | WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6: use common of_clk_init() call to initialize clocksShawn Guo2013-06-171-1/+2
| | | | | | | | Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX6: add i.MX6 specific L2 cache configurationDirk Behme2013-06-171-1/+35
| | | | | | | | | | | | | | | | | | | | | | | To improve the performance and power consumption add an i.MX6 specific L2 cache initialization. This configuration is taken from Freescale's kernel patch "ENGR00153601 [MX6]Adjust L2 cache parameter" [1] with two additional improvements: a) The L2X0_POWER_CTRL has only the two bits we set. So no need to read the register before. Remove the register read done in Freescale's patch. b) In the L2X0_PREFETCH_CTRL register, besides the double linefill (bit[30]), additionally enable the instruction and data prefetch (bit[29-28]). Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-19 19:00:04 +0000