summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/bcm-nsp.dtsi
blob: 15f07f9af3b3df082f8fd0676ebc843c5b097ab5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
/*
 *  BSD LICENSE
 *
 *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    * Redistributions of source code must retain the above copyright
 *      notice, this list of conditions and the following disclaimer.
 *    * Redistributions in binary form must reproduce the above copyright
 *      notice, this list of conditions and the following disclaimer in
 *      the documentation and/or other materials provided with the
 *      distribution.
 *    * Neither the name of Broadcom Corporation nor the names of its
 *      contributors may be used to endorse or promote products derived
 *      from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/bcm-nsp.h>

#include "skeleton.dtsi"

/ {
	compatible = "brcm,nsp";
	model = "Broadcom Northstar Plus SoC";
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			enable-method = "brcm,bcm-nsp-smp";
			secondary-boot-reg = <0xffff0fec>;
			reg = <0x1>;
		};
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
			      GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	mpcore {
		compatible = "simple-bus";
		ranges = <0x00000000 0x19000000 0x00023000>;
		#address-cells = <1>;
		#size-cells = <1>;

		a9pll: arm_clk@00000 {
			#clock-cells = <0>;
			compatible = "brcm,nsp-armpll";
			clocks = <&osc>;
			reg = <0x00000 0x1000>;
		};

		timer@20200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x20200 0x100>;
			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&periph_clk>;
		};

		twd-timer@20600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x20600 0x20>;
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&periph_clk>;
		};

		twd-watchdog@20620 {
			compatible = "arm,cortex-a9-twd-wdt";
			reg = <0x20620 0x20>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
						  IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&periph_clk>;
		};

		gic: interrupt-controller@21000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x21000 0x1000>,
			      <0x20100 0x100>;
		};

		L2: l2-cache {
			compatible = "arm,pl310-cache";
			reg = <0x22000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		osc: oscillator {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <25000000>;
		};

		iprocmed: iprocmed {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
			clock-div = <2>;
			clock-mult = <1>;
		};

		iprocslow: iprocslow {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
			clock-div = <4>;
			clock-mult = <1>;
		};

		periph_clk: periph_clk {
			#clock-cells = <0>;
			compatible = "fixed-factor-clock";
			clocks = <&a9pll>;
			clock-div = <2>;
			clock-mult = <1>;
		};
	};

	axi {
		compatible = "simple-bus";
		ranges = <0x00000000 0x18000000 0x0011c40c>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpioa: gpio@0020 {
			compatible = "brcm,nsp-gpio-a";
			reg = <0x0020 0x70>,
			      <0x3f1c4 0x1c>;
			#gpio-cells = <2>;
			gpio-controller;
			ngpios = <32>;
			interrupt-controller;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			gpio-ranges = <&pinctrl 0 0 32>;
		};

		uart0: serial@0300 {
			compatible = "ns16550a";
			reg = <0x0300 0x100>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		uart1: serial@0400 {
			compatible = "ns16550a";
			reg = <0x0400 0x100>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc>;
			status = "disabled";
		};

		dma@20000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x20000 0x1000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
		};

		amac0: ethernet@22000 {
			compatible = "brcm,nsp-amac";
			reg = <0x022000 0x1000>,
			      <0x110000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		amac1: ethernet@23000 {
			compatible = "brcm,nsp-amac";
			reg = <0x023000 0x1000>,
			      <0x111000 0x1000>;
			reg-names = "amac_base", "idm_base";
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		nand: nand@26000 {
			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
			reg = <0x026000 0x600>,
			      <0x11b408 0x600>,
			      <0x026f00 0x20>;
			reg-names = "nand", "iproc-idm", "iproc-ext";
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
			#size-cells = <0>;

			brcm,nand-has-wp;
		};

		gpiob: gpio@30000 {
			compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
			reg = <0x30000 0x50>;
			#gpio-cells = <2>;
			gpio-controller;
			ngpios = <4>;
			interrupt-controller;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
		};

		pwm: pwm@31000 {
			compatible = "brcm,iproc-pwm";
			reg = <0x31000 0x28>;
			clocks = <&osc>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		rng: rng@33000 {
			compatible = "brcm,bcm-nsp-rng";
			reg = <0x33000 0x14>;
		};

		qspi: qspi@27200 {
			compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
			reg = <0x027200 0x184>,
			      <0x027000 0x124>,
			      <0x11c408 0x004>,
			      <0x0273a0 0x01c>;
			reg-names = "mspi", "bspi", "intr_regs",
				    "intr_status_reg";
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "spi_lr_fullness_reached",
					  "spi_lr_session_aborted",
					  "spi_lr_impatient",
					  "spi_lr_session_done",
					  "spi_lr_overhead",
					  "mspi_done",
					  "mspi_halted";
			clocks = <&iprocmed>;
			clock-names = "iprocmed";
			num-cs = <2>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		ccbtimer0: timer@34000 {
			compatible = "arm,sp804";
			reg = <0x34000 0x1000>;
			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
		};

		ccbtimer1: timer@35000 {
			compatible = "arm,sp804";
			reg = <0x35000 0x1000>;
			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>;
			clock-names = "apb_pclk";
		};

		srab: srab@36000 {
			compatible = "brcm,nsp-srab";
			reg = <0x36000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";

			/* ports are defined in board DTS */
		};

		i2c0: i2c@38000 {
			compatible = "brcm,iproc-i2c";
			reg = <0x38000 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
			clock-frequency = <100000>;
		};

		watchdog@39000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x39000 0x1000>;
			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&iprocslow>, <&iprocslow>;
			clock-names = "wdogclk", "apb_pclk";
		};

		lcpll0: lcpll0@3f100 {
			#clock-cells = <1>;
			compatible = "brcm,nsp-lcpll0";
			reg = <0x3f100 0x14>;
			clocks = <&osc>;
			clock-output-names = "lcpll0", "pcie_phy", "sdio",
					     "ddr_phy";
		};

		genpll: genpll@3f140 {
			#clock-cells = <1>;
			compatible = "brcm,nsp-genpll";
			reg = <0x3f140 0x24>;
			clocks = <&osc>;
			clock-output-names = "genpll", "phy", "ethernetclk",
					     "usbclk", "iprocfast", "sata1",
					     "sata2";
		};

		pinctrl: pinctrl@3f1c0 {
			compatible = "brcm,nsp-pinmux";
			reg = <0x3f1c0 0x04>,
			      <0x30028 0x04>,
			      <0x3f408 0x04>;
		};

		sata_phy: sata_phy@40100 {
			compatible = "brcm,iproc-nsp-sata-phy";
			reg = <0x40100 0x340>;
			reg-names = "phy";
			#address-cells = <1>;
			#size-cells = <0>;

			sata_phy0: sata-phy@0 {
				reg = <0>;
				#phy-cells = <0>;
				status = "disabled";
			};

			sata_phy1: sata-phy@1 {
				reg = <1>;
				#phy-cells = <0>;
				status = "disabled";
			};
		};

		sata: ahci@41000 {
			compatible = "brcm,bcm-nsp-ahci";
			reg-names = "ahci", "top-ctrl";
			reg = <0x41000 0x1000>, <0x40020 0x1c>;
			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			sata0: sata-port@0 {
				reg = <0>;
				phys = <&sata_phy0>;
				phy-names = "sata-phy";
			};

			sata1: sata-port@1 {
				reg = <1>;
				phys = <&sata_phy1>;
				phy-names = "sata-phy";
			};
		};
	};

	pcie0: pcie@18012000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18012000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;

		linux,pci-domain = <0>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;

		status = "disabled";

		msi-parent = <&msi0>;
		msi0: msi@18012000 {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>,
				     <GIC_SPI 128 IRQ_TYPE_NONE>,
				     <GIC_SPI 129 IRQ_TYPE_NONE>,
				     <GIC_SPI 130 IRQ_TYPE_NONE>;
			brcm,pcie-msi-inten;
		};
	};

	pcie1: pcie@18013000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18013000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;

		linux,pci-domain = <1>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;

		status = "disabled";

		msi-parent = <&msi1>;
		msi1: msi@18013000 {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 133 IRQ_TYPE_NONE>,
				     <GIC_SPI 134 IRQ_TYPE_NONE>,
				     <GIC_SPI 135 IRQ_TYPE_NONE>,
				     <GIC_SPI 136 IRQ_TYPE_NONE>;
			brcm,pcie-msi-inten;
		};
	};

	pcie2: pcie@18014000 {
		compatible = "brcm,iproc-pcie";
		reg = <0x18014000 0x1000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;

		linux,pci-domain = <2>;

		bus-range = <0x00 0xff>;

		#address-cells = <3>;
		#size-cells = <2>;
		device_type = "pci";

		/* Note: The HW does not support I/O resources.  So,
		 * only the memory resource range is being specified.
		 */
		ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;

		status = "disabled";

		msi-parent = <&msi2>;
		msi2: msi@18014000 {
			compatible = "brcm,iproc-msi";
			msi-controller;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>,
				     <GIC_SPI 140 IRQ_TYPE_NONE>,
				     <GIC_SPI 141 IRQ_TYPE_NONE>,
				     <GIC_SPI 142 IRQ_TYPE_NONE>;
			brcm,pcie-msi-inten;
		};
	};
};