update etna driver to 610025b

4 files changed, 9 insertions, 8 deletions

diff --git a/src/gallium/drivers/etna/etna_clear_blit.c b/src/gallium/drivers/etna/etna_clear_blit.c
index 13a1d9b9c2..1b3b8f8084 100644
--- a/src/gallium/drivers/etna/etna_clear_blit.c
+++ b/src/gallium/drivers/etna/etna_clear_blit.c
@@ -62,7 +62,7 @@ static void etna_pipe_blit_save_state(struct pipe_context *pipe)
 }
 
 /* Generate clear command for a surface (non-fast clear case) */
-void etna_rs_gen_clear_surface(struct compiled_rs_state *rs_state, struct etna_surface *surf, uint32_t clear_value)
+void etna_rs_gen_clear_surface(struct etna_ctx *ctx, struct compiled_rs_state *rs_state, struct etna_surface *surf, uint32_t clear_value)
 {
     uint bs = util_format_get_blocksize(surf->base.format);
     uint format = 0;
@@ -78,7 +78,7 @@ void etna_rs_gen_clear_surface(struct compiled_rs_state *rs_state, struct etna_s
     bool tiled_clear = (surf->surf.padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
                        (surf->surf.padded_height & ETNA_RS_HEIGHT_MASK) == 0;
     struct etna_bo *dest_bo = etna_resource(surf->base.texture)->bo;
-    etna_compile_rs_state(rs_state, &(struct rs_state){
+    etna_compile_rs_state(ctx, rs_state, &(struct rs_state){
             .source_format = format,
             .dest_format = format,
             .dest_addr = etna_bo_gpu_address(dest_bo) + surf->surf.offset,
@@ -149,7 +149,7 @@ static void etna_pipe_clear(struct pipe_context *pipe,
             else if(unlikely(new_clear_value != surf->level->clear_value)) /* Queue normal RS clear for non-TS surfaces */
             {
                 /* If clear color changed, re-generate stored command */
-                etna_rs_gen_clear_surface(&surf->clear_command, surf, new_clear_value);
+                etna_rs_gen_clear_surface(priv->ctx, &surf->clear_command, surf, new_clear_value);
             }
             etna_submit_rs_state(priv->ctx, &surf->clear_command);
             surf->level->clear_value = new_clear_value;
@@ -173,7 +173,7 @@ static void etna_pipe_clear(struct pipe_context *pipe,
         } else if(unlikely(new_clear_value != surf->level->clear_value)) /* Queue normal RS clear for non-TS surfaces */
         {
             /* If clear depth value changed, re-generate stored command */
-            etna_rs_gen_clear_surface(&surf->clear_command, surf, new_clear_value);
+            etna_rs_gen_clear_surface(priv->ctx, &surf->clear_command, surf, new_clear_value);
         }
         etna_submit_rs_state(priv->ctx, &surf->clear_command);
         surf->level->clear_value = new_clear_value;
diff --git a/src/gallium/drivers/etna/etna_clear_blit.h b/src/gallium/drivers/etna/etna_clear_blit.h
index 097c307b5b..ac5f671e3c 100644
--- a/src/gallium/drivers/etna/etna_clear_blit.h
+++ b/src/gallium/drivers/etna/etna_clear_blit.h
@@ -26,11 +26,12 @@
 
 #include <stdint.h>
 
+struct etna_ctx;
 struct pipe_context;
 struct etna_surface;
 struct compiled_rs_state;
 
-void etna_rs_gen_clear_surface(struct compiled_rs_state *rs_state, struct etna_surface *surf, uint32_t clear_value);
+void etna_rs_gen_clear_surface(struct etna_ctx *ctx, struct compiled_rs_state *rs_state, struct etna_surface *surf, uint32_t clear_value);
 
 void etna_pipe_clear_blit_init(struct pipe_context *pipe);
 
diff --git a/src/gallium/drivers/etna/etna_screen.c b/src/gallium/drivers/etna/etna_screen.c
index 6a8f2bfcc9..f381c7d044 100644
--- a/src/gallium/drivers/etna/etna_screen.c
+++ b/src/gallium/drivers/etna/etna_screen.c
@@ -471,7 +471,7 @@ static void etna_screen_flush_frontbuffer( struct pipe_screen *screen,
 
     /* Kick off RS here */
     struct compiled_rs_state copy_to_screen;
-    etna_compile_rs_state(&copy_to_screen, &(struct rs_state){
+    etna_compile_rs_state(ctx, &copy_to_screen, &(struct rs_state){
                 .source_format = translate_rt_format(rt_resource->base.format, false),
                 .source_tiling = rt_resource->layout,
                 .source_addr = etna_bo_gpu_address(rt_resource->bo) + rt_resource->levels[level].offset,
diff --git a/src/gallium/drivers/etna/etna_surface.c b/src/gallium/drivers/etna/etna_surface.c
index 6b07d402d2..244275833b 100644
--- a/src/gallium/drivers/etna/etna_surface.c
+++ b/src/gallium/drivers/etna/etna_surface.c
@@ -89,7 +89,7 @@ static struct pipe_surface *etna_pipe_create_surface(struct pipe_context *pipe,
            Currently uses a fixed row size of 64 bytes. Some benchmarking with different sizes may be in order.
          */
         struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
-        etna_compile_rs_state(&surf->clear_command, &(struct rs_state){
+        etna_compile_rs_state(priv->ctx, &surf->clear_command, &(struct rs_state){
                 .source_format = RS_FORMAT_A8R8G8B8,
                 .dest_format = RS_FORMAT_A8R8G8B8,
                 .dest_addr = etna_bo_gpu_address(ts_bo) + surf->surf.ts_offset,
@@ -103,7 +103,7 @@ static struct pipe_surface *etna_pipe_create_surface(struct pipe_context *pipe,
                 .clear_bits = 0xffff
             });
     } else {
-        etna_rs_gen_clear_surface(&surf->clear_command, surf, surf->level->clear_value);
+        etna_rs_gen_clear_surface(priv->ctx, &surf->clear_command, surf, surf->level->clear_value);
     }
     etna_resource_touch(pipe, surf->base.texture);
     return &surf->base;