diff options
Diffstat (limited to 'patches/barebox-2012.11.0/0001-ARM-OMAP-AM33XX-create-new-ARCH-for-AM33xx.patch')
| -rw-r--r-- | patches/barebox-2012.11.0/0001-ARM-OMAP-AM33XX-create-new-ARCH-for-AM33xx.patch | 433 |
1 files changed, 433 insertions, 0 deletions
diff --git a/patches/barebox-2012.11.0/0001-ARM-OMAP-AM33XX-create-new-ARCH-for-AM33xx.patch b/patches/barebox-2012.11.0/0001-ARM-OMAP-AM33XX-create-new-ARCH-for-AM33xx.patch new file mode 100644 index 0000000..88e307d --- /dev/null +++ b/patches/barebox-2012.11.0/0001-ARM-OMAP-AM33XX-create-new-ARCH-for-AM33xx.patch @@ -0,0 +1,433 @@ +From 161fca94672753b076779ffb19ab3b6db17fd82c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Teresa=20G=C3=A1mez?= <t.gamez@phytec.de> +Date: Thu, 20 Sep 2012 16:02:03 +0200 +Subject: [PATCH] ARM OMAP AM33XX: create new ARCH for AM33xx +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Created ARCH for AM33xx boards as second stage bootloader. +This includes: +- Added dmtimer0 +- Created basic header files +- Added MMC support for ARCH_AM33XX +- Added reset function + +Signed-off-by: Teresa Gámez <t.gamez@phytec.de> +--- + arch/arm/mach-omap/Kconfig | 11 ++++ + arch/arm/mach-omap/Makefile | 2 + + arch/arm/mach-omap/am33xx_generic.c | 29 +++++++++ + arch/arm/mach-omap/dmtimer0.c | 72 ++++++++++++++++++++++ + arch/arm/mach-omap/gpio.c | 31 ++++++++++ + arch/arm/mach-omap/include/mach/am33xx-clock.h | 25 ++++++++ + arch/arm/mach-omap/include/mach/am33xx-silicon.h | 51 +++++++++++++++ + arch/arm/mach-omap/include/mach/clocks.h | 7 +++ + arch/arm/mach-omap/include/mach/omap3-clock.h | 3 - + arch/arm/mach-omap/include/mach/silicon.h | 3 + + arch/arm/mach-omap/include/mach/timers.h | 22 +++++++ + drivers/mci/Kconfig | 2 +- + 12 files changed, 254 insertions(+), 4 deletions(-) + create mode 100644 arch/arm/mach-omap/am33xx_generic.c + create mode 100644 arch/arm/mach-omap/dmtimer0.c + create mode 100644 arch/arm/mach-omap/include/mach/am33xx-clock.h + create mode 100644 arch/arm/mach-omap/include/mach/am33xx-silicon.h + +diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig +index aa31633..7e7e855 100644 +--- a/arch/arm/mach-omap/Kconfig ++++ b/arch/arm/mach-omap/Kconfig +@@ -42,12 +42,23 @@ config ARCH_OMAP4 + help + Say Y here if you are using Texas Instrument's OMAP4 based platform + ++config ARCH_AM33XX ++ bool "AM33xx" ++ select CPU_V7 ++ select GENERIC_GPIO ++ select OMAP_CLOCK_SOURCE_DMTIMER0 ++ help ++ Say Y here if you are using Texas Instrument's AM33xx based platform ++ + endchoice + + # Blind enable all possible clocks.. think twice before you do this. + config OMAP_CLOCK_SOURCE_S32K + bool + ++config OMAP_CLOCK_SOURCE_DMTIMER0 ++ bool ++ + config OMAP3_CLOCK_CONFIG + prompt "Clock Configuration" + bool +diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile +index 3a6d50c..1e1a421 100644 +--- a/arch/arm/mach-omap/Makefile ++++ b/arch/arm/mach-omap/Makefile +@@ -18,10 +18,12 @@ + obj-$(CONFIG_ARCH_OMAP) += syslib.o + pbl-$(CONFIG_ARCH_OMAP) += syslib.o + obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o ++obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER0) += dmtimer0.o + obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o + pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o + obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o + pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o ++obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o + obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o + pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o + obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o +diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c +new file mode 100644 +index 0000000..ba08773 +--- /dev/null ++++ b/arch/arm/mach-omap/am33xx_generic.c +@@ -0,0 +1,29 @@ ++/* ++ * (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include <io.h> ++#include <mach/silicon.h> ++#include <mach/clocks.h> ++ ++void __noreturn reset_cpu(unsigned long addr) ++{ ++ writel(PRM_RSTCTRL_RESET, PRM_REG(RSTCTRL)); ++ ++ while (1); ++} +diff --git a/arch/arm/mach-omap/dmtimer0.c b/arch/arm/mach-omap/dmtimer0.c +new file mode 100644 +index 0000000..b8ec43f +--- /dev/null ++++ b/arch/arm/mach-omap/dmtimer0.c +@@ -0,0 +1,72 @@ ++/** ++ * @file ++ * @brief Support DMTimer0 counter ++ * ++ * FileName: arch/arm/mach-omap/dmtimer0.c ++ */ ++/* ++ * This File is based on arch/arm/mach-omap/s32k_clksource.c ++ * (C) Copyright 2008 ++ * Texas Instruments, <www.ti.com> ++ * Nishanth Menon <x0nishan@ti.com> ++ * ++ * (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include <clock.h> ++#include <init.h> ++#include <io.h> ++#include <mach/silicon.h> ++#include <mach/timers.h> ++ ++#define CLK_RC32K 32768 ++ ++/** ++ * @brief Provide a simple counter read ++ * ++ * @return DMTimer0 counter ++ */ ++static uint64_t dmtimer0_read(void) ++{ ++ return readl(AM33XX_DMTIMER0_BASE + TCRR); ++} ++ ++static struct clocksource dmtimer0_cs = { ++ .read = dmtimer0_read, ++ .mask = CLOCKSOURCE_MASK(32), ++ .shift = 10, ++}; ++ ++/** ++ * @brief Initialize the Clock ++ * ++ * Enable dmtimer0. ++ * ++ * @return result of @ref init_clock ++ */ ++static int dmtimer0_init(void) ++{ ++ dmtimer0_cs.mult = clocksource_hz2mult(CLK_RC32K, dmtimer0_cs.shift); ++ /* Enable counter */ ++ writel(0x3, AM33XX_DMTIMER0_BASE + TCLR); ++ ++ return init_clock(&dmtimer0_cs); ++} ++ ++/* Run me at boot time */ ++core_initcall(dmtimer0_init); +diff --git a/arch/arm/mach-omap/gpio.c b/arch/arm/mach-omap/gpio.c +index 49ffbda..8a9eeed 100644 +--- a/arch/arm/mach-omap/gpio.c ++++ b/arch/arm/mach-omap/gpio.c +@@ -48,6 +48,37 @@ struct omap_gpio_chip { + struct gpio_chip chip; + }; + ++#ifdef CONFIG_ARCH_OMAP3 ++static void __iomem *gpio_bank[] = { ++ (void *)0x48310000, ++ (void *)0x49050000, ++ (void *)0x49052000, ++ (void *)0x49054000, ++ (void *)0x49056000, ++ (void *)0x49058000, ++}; ++#endif ++ ++#ifdef CONFIG_ARCH_OMAP4 ++static void __iomem *gpio_bank[] = { ++ (void *)0x4a310100, ++ (void *)0x48055100, ++ (void *)0x48057100, ++ (void *)0x48059100, ++ (void *)0x4805b100, ++ (void *)0x4805d100, ++}; ++#endif ++ ++#ifdef CONFIG_ARCH_AM33XX ++static void __iomem *gpio_bank[] = { ++ (void *)0x44e07100, ++ (void *)0x4804c100, ++ (void *)0x481ac100, ++ (void *)0x481ae100, ++}; ++#endif ++ + static inline int omap_get_gpio_index(int gpio) + { + return gpio & 0x1f; +diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h +new file mode 100644 +index 0000000..654c104 +--- /dev/null ++++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h +@@ -0,0 +1,25 @@ ++/* ++ * (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#ifndef _AM33XX_CLOCKS_H_ ++#define _AM33XX_CLOCKS_H_ ++ ++/** PRM Clock Regs */ ++#define PRM_RSTCTRL 0x0f00 ++ ++#endif /* endif _AM33XX_CLOCKS_H_ */ +diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h +new file mode 100644 +index 0000000..7b13991 +--- /dev/null ++++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h +@@ -0,0 +1,51 @@ ++/* ++ * This file contains the address info for various AM33XX modules. ++ * ++ * Copyright (C) 2012 Teresa Gámez <t.gamez@phytec.de>, ++ * Phytec Messtechnik GmbH ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation version 2. ++ * ++ * This program is distributed "as is" WITHOUT ANY WARRANTY of any ++ * kind, whether express or implied; without even the implied warranty ++ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#ifndef __ASM_ARCH_AM33XX_H ++#define __ASM_ARCH_AM33XX_H ++ ++/** AM335x Internal Bus Base addresses */ ++#define AM33XX_L4_WKUP_BASE 0x44C00000 ++#define AM33XX_L4_PER_BASE 0x48000000 ++#define AM33XX_L4_FAST_BASE 0x4A000000 ++ ++/* UART */ ++#define AM33XX_UART0_BASE (AM33XX_L4_WKUP_BASE + 0x209000) ++#define AM33XX_UART1_BASE (AM33XX_L4_PER_BASE + 0x22000) ++#define AM33XX_UART2_BASE (AM33XX_L4_PER_BASE + 0x24000) ++ ++ ++/* EMFI Registers */ ++#define AM33XX_EMFI0_BASE 0x4C000000 ++ ++#define AM33XX_DRAM_ADDR_SPACE_START 0x80000000 ++#define AM33XX_DRAM_ADDR_SPACE_END 0xC0000000 ++ ++/* GPMC */ ++#define OMAP_GPMC_BASE 0x50000000 ++ ++/* MMC */ ++#define AM33XX_MMCHS0_BASE (AM33XX_L4_PER_BASE + 0x60000) ++ ++/* DTMTimer0 */ ++#define AM33XX_DMTIMER0_BASE (AM33XX_L4_WKUP_BASE + 0x205000) ++ ++/* PRM */ ++#define OMAP_PRM_BASE (AM33XX_L4_WKUP_BASE + 0x200000) ++ ++#define PRM_RSTCTRL_RESET 0x1 ++ ++#endif +diff --git a/arch/arm/mach-omap/include/mach/clocks.h b/arch/arm/mach-omap/include/mach/clocks.h +index b2b0c99..5729b50 100644 +--- a/arch/arm/mach-omap/include/mach/clocks.h ++++ b/arch/arm/mach-omap/include/mach/clocks.h +@@ -37,6 +37,9 @@ + #define S26M 26000000 + #define S38_4M 38400000 + ++#define CM_REG(REGNAME) (OMAP_CM_BASE + CM_##REGNAME) ++#define PRM_REG(REGNAME) (OMAP_PRM_BASE + PRM_##REGNAME) ++ + #ifdef CONFIG_ARCH_OMAP3 + #include <mach/omap3-clock.h> + #endif +@@ -44,4 +47,8 @@ + #include <mach/omap4-clock.h> + #endif + ++#ifdef CONFIG_ARCH_AM33XX ++#include <mach/am33xx-clock.h> ++#endif ++ + #endif /* __OMAP_CLOCKS_H_ */ +diff --git a/arch/arm/mach-omap/include/mach/omap3-clock.h b/arch/arm/mach-omap/include/mach/omap3-clock.h +index 4f5a1d1..c36489c 100644 +--- a/arch/arm/mach-omap/include/mach/omap3-clock.h ++++ b/arch/arm/mach-omap/include/mach/omap3-clock.h +@@ -27,8 +27,6 @@ + #define _OMAP343X_CLOCKS_H_ + + /** CM Clock Regs Wrapper */ +-#define CM_REG(REGNAME) (OMAP_CM_BASE + CM_##REGNAME) +- + #define CM_FCLKEN_IVA2 0X0000 + #define CM_CLKEN_PLL_IVA2 0X0004 + #define CM_IDLEST_PLL_IVA2 0X0024 +@@ -77,7 +75,6 @@ + #define CM_CLKSTCTRL_USBH 0x1448 + + /** PRM Clock Regs */ +-#define PRM_REG(REGNAME) (OMAP_PRM_BASE + PRM_##REGNAME) + #define PRM_CLKSEL 0x0D40 + #define PRM_RSTCTRL 0x1250 + #define PRM_CLKSRC_CTRL 0x1270 +diff --git a/arch/arm/mach-omap/include/mach/silicon.h b/arch/arm/mach-omap/include/mach/silicon.h +index 5ee1931..ff30ad9 100644 +--- a/arch/arm/mach-omap/include/mach/silicon.h ++++ b/arch/arm/mach-omap/include/mach/silicon.h +@@ -24,6 +24,9 @@ + #ifdef CONFIG_ARCH_OMAP4 + #include <mach/omap4-silicon.h> + #endif ++#ifdef CONFIG_ARCH_AM33XX ++#include <mach/am33xx-silicon.h> ++#endif + + /* If Architecture specific init functions are present */ + #ifndef __ASSEMBLY__ +diff --git a/arch/arm/mach-omap/include/mach/timers.h b/arch/arm/mach-omap/include/mach/timers.h +index e8dad9a..66f5de9 100644 +--- a/arch/arm/mach-omap/include/mach/timers.h ++++ b/arch/arm/mach-omap/include/mach/timers.h +@@ -30,6 +30,7 @@ + #ifndef __ASM_ARCH_GPT_H + #define __ASM_ARCH_GPT_H + ++#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) + /** General Purpose timer regs offsets (32 bit regs) */ + #define TIDR 0x0 /* r */ + #define TIOCP_CFG 0x10 /* rw */ +@@ -52,5 +53,26 @@ + /** Sync 32Khz Timer registers */ + #define S32K_CR (OMAP_32KTIMER_BASE + 0x10) + #define S32K_FREQUENCY 32768 ++#endif ++ ++#if defined(CONFIG_ARCH_AM33XX) ++#define TIDR 0x0 ++#define TIOCP_CFG 0x10 ++#define IRQ_EOI 0x20 ++#define IRQSTATUS_RAW 0x24 ++#define IRQSTATUS 0x28 ++#define IRQSTATUS_SET 0x2c ++#define IRQSTATUS_CLR 0x30 ++#define IRQWAKEEN 0x34 ++#define TCLR 0x38 ++#define TCRR 0x3C ++#define TLDR 0x40 ++#define TTGR 0x44 ++#define TWPS 0x48 ++#define TMAR 0x4C ++#define TCAR1 0x50 ++#define TSICR 0x54 ++#define TCAR2 0x58 ++#endif + + #endif /*__ASM_ARCH_GPT_H */ +diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig +index b1a678e..fb95c1e 100644 +--- a/drivers/mci/Kconfig ++++ b/drivers/mci/Kconfig +@@ -67,7 +67,7 @@ config MCI_IMX_ESDHC_PIO + + config MCI_OMAP_HSMMC + bool "OMAP HSMMC" +- depends on ARCH_OMAP4 || ARCH_OMAP3 ++ depends on ARCH_OMAP4 || ARCH_OMAP3 || ARCH_AM33XX + help + Enable this entry to add support to read and write SD cards on + both OMAP3 and OMAP4 based systems. |