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From b284ba947ff3626063aabd0e5bb9ec16aba8e145 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Teresa=20G=C3=A1mez?= <t.gamez@phytec.de>
Date: Tue, 9 Jul 2013 11:23:17 +0200
Subject: [PATCH 08/17] ARM: AM33xx: Enable clock for all GPIO banks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/am33xx_clock.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c
index 4451d62..e4d9d77 100644
--- a/arch/arm/mach-omap/am33xx_clock.c
+++ b/arch/arm/mach-omap/am33xx_clock.c
@@ -53,6 +53,18 @@ static void interface_clocks_enable(void)
/* GPIO0 */
__raw_writel(PRCM_MOD_EN, CM_WKUP_GPIO0_CLKCTRL);
while (__raw_readl(CM_WKUP_GPIO0_CLKCTRL) != PRCM_MOD_EN);
+
+ /* GPIO1 */
+ __raw_writel(PRCM_MOD_EN, CM_PER_GPIO1_CLKCTRL);
+ while (__raw_readl(CM_PER_GPIO1_CLKCTRL) != PRCM_MOD_EN);
+
+ /* GPIO2 */
+ __raw_writel(PRCM_MOD_EN, CM_PER_GPIO2_CLKCTRL);
+ while (__raw_readl(CM_PER_GPIO2_CLKCTRL) != PRCM_MOD_EN);
+
+ /* GPIO3 */
+ __raw_writel(PRCM_MOD_EN, CM_PER_GPIO3_CLKCTRL);
+ while (__raw_readl(CM_PER_GPIO3_CLKCTRL) != PRCM_MOD_EN);
}
static void power_domain_transition_enable(void)
--
1.7.10.4
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