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* etnaviv: nir: globalize local registersetnaviv-nirPhilipp Zabel2018-06-051-0/+21
* etnaviv: nir: avoid multiple uniform src for alu opsMichael Tretter2018-06-051-0/+36
* etnaviv: nir: add extra mov for uniforms used as outputMichael Tretter2018-06-051-0/+23
* etnaviv: nir: implement conditionalsPhilipp Zabel2018-06-052-0/+93
* etnaviv: nir: add texture fixup path before register assignmentPhilipp Zabel2018-06-051-0/+27
* etnaviv: compiler: generate texture loadsPhilipp Zabel2018-06-051-0/+65
* etnaviv: compiler: ignore nir_instr_type_ssa_undefMichael Tretter2018-06-051-0/+3
* etnaviv: nir: remove undefined variablesMichael Tretter2018-06-051-0/+35
* etnaviv: nir: add a nop intrinsic to empty shadersPhilipp Zabel2018-06-051-0/+16
* etnaviv: compiler: generate instructions for log2Michael Tretter2018-06-051-0/+18
* etnaviv: compiler: add code emitter for alu operationsMichael Tretter2018-06-051-0/+290
* etnaviv: compiler: avoid using tgsi_shader_infoMichael Tretter2018-06-051-2/+35
* etnaviv: compiler: setup registers from nirMichael Tretter2018-06-051-12/+212
* etnaviv: nir: add virtual register classesPhilipp Zabel2018-06-051-23/+259
* etnaviv: nir: merge mov of result into alu opPhilipp Zabel2018-06-051-0/+43
* etnaviv: nir: hardwire position locationPhilipp Zabel2018-06-051-0/+76
* etnaviv: generate and optimize NIRPhilipp Zabel2018-06-057-1/+647
* etnaviv: add debug option to report NIR as supported and preferred shader IRPhilipp Zabel2018-06-052-2/+12
* etnaviv: compiler: extract compile shader from tgsiMichael Tretter2018-06-051-19/+27
* etnaviv: extract get_mystery_meat_load_balancingMichael Tretter2018-06-051-26/+34
* etnaviv: prefix COMPARE_FUNC enum values in rnndbPhilipp Zabel2018-06-051-8/+8
* anv: intel: add softpin flag on imported BOsHEADmasterLionel Landwerlin2018-06-051-0/+2
* autotools: add missing android file to packageEric Engestrom2018-06-051-0/+1
* meson: fix platforms check for `-D egl=true`Eric Engestrom2018-06-051-1/+1
* mesa: Make sure that imm draws are flushed before other draws execute.Mathias Fröhlich2018-06-054-65/+56
* virgl: use bits in caps set v2gurchetansingh@chromium.org2018-06-052-0/+6
* virgl: add shader offset alignment to to v2 caps structgurchetansingh@chromium.org2018-06-053-1/+4
* i965: Prepare batchbuffer module for softpin support.Kenneth Graunke2018-06-042-3/+39
* i965: Add virtual memory allocator infrastructure to brw_bufmgr.Kenneth Graunke2018-06-042-1/+286
* i965: Disable internal CCS for shadows of multi-sampled windowsJason Ekstrand2018-06-041-1/+10
* i965/miptree: Rename a parameter to create_for_dri_imageJason Ekstrand2018-06-042-4/+4
* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-043-126/+72
* intel/eu: Set flag [sub]register number differently for 3srcJason Ekstrand2018-06-041-3/+10
* intel/eu: Copy fields manually in brw_next_insnJason Ekstrand2018-06-041-1/+94
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-044-55/+79
* trace: Fix parsing of recent traces.Jose Fonseca2018-06-041-5/+26
* trace: Fix trace_context_transfer_unmap methods.Jose Fonseca2018-06-041-18/+42
* amd/common: use the dimension-aware image intrinsics on LLVM 7+Nicolai Hähnle2018-06-041-24/+165
* i965: Fix batch-last mode to properly swap BOs.Kenneth Graunke2018-06-041-0/+5
* radv: fix a GPU hang when MRTs are sparseSamuel Pitoiset2018-06-041-0/+10
* radv: Don't pass a TESS_EVAL shader when tesselation is not enabled.Bas Nieuwenhuizen2018-06-041-0/+2
* nir: implement the GLSL equivalent of if simplication in nir_opt_ifSamuel Pitoiset2018-06-041-5/+92
* nir: make is_comparison() a non-static helper functionSamuel Pitoiset2018-06-042-25/+25
* nir: use num_components wrappers in print/validate.Dave Airlie2018-06-042-15/+5
* doc: update calendar, add news and link release notes for 18.0.5Juan A. Suarez Romero2018-06-033-7/+11
* docs: add sha256 checksums for 18.0.5Juan A. Suarez Romero2018-06-031-1/+2
* docs: add release notes for 18.0.5Juan A. Suarez Romero2018-06-031-0/+161
* scons: Fix MinGW cross compilation with LLVM 5.0.Jose Fonseca2018-06-021-1/+8
* anv: Don't even bother processing relocs if we have softpinJason Ekstrand2018-06-011-3/+15
* anv: Refactor reloc handling in execbuf_add_boJason Ekstrand2018-06-011-36/+42
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