diff options
Diffstat (limited to 'configs/platform-rpi/patches/linux-4.4/0002-irq-bcm2836-Add-SMP-support-for-the-2836.patch')
| -rw-r--r-- | configs/platform-rpi/patches/linux-4.4/0002-irq-bcm2836-Add-SMP-support-for-the-2836.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/configs/platform-rpi/patches/linux-4.4/0002-irq-bcm2836-Add-SMP-support-for-the-2836.patch b/configs/platform-rpi/patches/linux-4.4/0002-irq-bcm2836-Add-SMP-support-for-the-2836.patch new file mode 100644 index 0000000..2e25c68 --- /dev/null +++ b/configs/platform-rpi/patches/linux-4.4/0002-irq-bcm2836-Add-SMP-support-for-the-2836.patch @@ -0,0 +1,75 @@ +From: Andrea Merello <andrea.merello@gmail.com> +Date: Sun, 3 May 2015 01:03:11 +0200 +Subject: [PATCH] irq: bcm2836: Add SMP support for the 2836 + +The firmware sets the secondaries spinning waiting for a non-NULL +value to show up in the last IPI mailbox. + +The original SMP port from the downstream tree was done by Andrea, and +Eric cleaned it up/rewrote it a few times from there. + +Signed-off-by: Andrea Merello <andrea.merello@gmail.com> +Signed-off-by: Eric Anholt <eric@anholt.net> +Signed-off-by: Alexander Aring <alex.aring@gmail.com> +--- + drivers/irqchip/irq-bcm2836.c | 27 +++++++++++++++++++++++++-- + 1 file changed, 25 insertions(+), 2 deletions(-) + +diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c +index 6ec125ef3607..c5ef4dfb5bb0 100644 +--- a/drivers/irqchip/irq-bcm2836.c ++++ b/drivers/irqchip/irq-bcm2836.c +@@ -53,14 +53,16 @@ + /* Same status bits as above, but for FIQ. */ + #define LOCAL_FIQ_PENDING0 0x070 + /* +- * Mailbox0 write-to-set bits. There are 16 mailboxes, 4 per CPU, and ++ * Mailbox write-to-set bits. There are 16 mailboxes, 4 per CPU, and + * these bits are organized by mailbox number and then CPU number. We + * use mailbox 0 for IPIs. The mailbox's interrupt is raised while + * any bit is set. + */ + #define LOCAL_MAILBOX0_SET0 0x080 +-/* Mailbox0 write-to-clear bits. */ ++#define LOCAL_MAILBOX3_SET0 0x08c ++/* Mailbox write-to-clear bits. */ + #define LOCAL_MAILBOX0_CLR0 0x0c0 ++#define LOCAL_MAILBOX3_CLR0 0x0cc + + #define LOCAL_IRQ_CNTPSIRQ 0 + #define LOCAL_IRQ_CNTPNSIRQ 1 +@@ -226,6 +228,26 @@ static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = { + .xlate = irq_domain_xlate_onecell + }; + ++#ifdef CONFIG_SMP ++int __init bcm2836_smp_boot_secondary(unsigned int cpu, ++ struct task_struct *idle) ++{ ++ unsigned long secondary_startup_phys = ++ (unsigned long)virt_to_phys((void *)secondary_startup); ++ ++ dsb(); ++ writel(secondary_startup_phys, ++ intc.base + LOCAL_MAILBOX3_SET0 + 16 * cpu); ++ ++ return 0; ++} ++ ++static const struct smp_operations bcm2836_smp_ops __initconst = { ++ .smp_boot_secondary = bcm2836_smp_boot_secondary, ++}; ++ ++#endif ++ + static void + bcm2836_arm_irqchip_smp_init(void) + { +@@ -237,6 +259,7 @@ bcm2836_arm_irqchip_smp_init(void) + register_cpu_notifier(&bcm2836_arm_irqchip_cpu_notifier); + + set_smp_cross_call(bcm2836_arm_irqchip_send_ipi); ++ smp_set_ops(&bcm2836_smp_ops); + #endif + } + |