diff options
Diffstat (limited to 'configs/platform-rpi/patches/linux-4.4/0004-ARM-bcm2835-Split-the-DT-for-peripherals-from-the-DT.patch')
| -rw-r--r-- | configs/platform-rpi/patches/linux-4.4/0004-ARM-bcm2835-Split-the-DT-for-peripherals-from-the-DT.patch | 444 |
1 files changed, 444 insertions, 0 deletions
diff --git a/configs/platform-rpi/patches/linux-4.4/0004-ARM-bcm2835-Split-the-DT-for-peripherals-from-the-DT.patch b/configs/platform-rpi/patches/linux-4.4/0004-ARM-bcm2835-Split-the-DT-for-peripherals-from-the-DT.patch new file mode 100644 index 0000000..1d01eb3 --- /dev/null +++ b/configs/platform-rpi/patches/linux-4.4/0004-ARM-bcm2835-Split-the-DT-for-peripherals-from-the-DT.patch @@ -0,0 +1,444 @@ +From: Eric Anholt <eric@anholt.net> +Date: Wed, 16 Dec 2015 13:24:40 -0800 +Subject: [PATCH] ARM: bcm2835: Split the DT for peripherals from the DT for + the CPU + +The set of peripherals remained constant across bcm2835 (Raspberry Pi +1) and bcm2836 (Raspberry Pi 2), but the CPU was swapped out. Split +the files so that we can include just peripheral setup in 2836. + +Signed-off-by: Eric Anholt <eric@anholt.net> +Signed-off-by: Alexander Aring <alex.aring@gmail.com> +--- + arch/arm/boot/dts/bcm2835.dtsi | 194 +------------------------------------- + arch/arm/boot/dts/bcm283x.dtsi | 209 +++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 210 insertions(+), 193 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm283x.dtsi + +diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi +index aef64de77495..b83b32639358 100644 +--- a/arch/arm/boot/dts/bcm2835.dtsi ++++ b/arch/arm/boot/dts/bcm2835.dtsi +@@ -1,206 +1,14 @@ +-#include <dt-bindings/pinctrl/bcm2835.h> +-#include <dt-bindings/clock/bcm2835.h> +-#include "skeleton.dtsi" ++#include "bcm283x.dtsi" + + / { + compatible = "brcm,bcm2835"; +- model = "BCM2835"; +- interrupt-parent = <&intc>; +- +- chosen { +- bootargs = "earlyprintk console=ttyAMA0"; +- }; + + soc { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <1>; + ranges = <0x7e000000 0x20000000 0x02000000>; + dma-ranges = <0x40000000 0x00000000 0x20000000>; + +- timer@7e003000 { +- compatible = "brcm,bcm2835-system-timer"; +- reg = <0x7e003000 0x1000>; +- interrupts = <1 0>, <1 1>, <1 2>, <1 3>; +- /* This could be a reference to BCM2835_CLOCK_TIMER, +- * but we don't have the driver using the common clock +- * support yet. +- */ +- clock-frequency = <1000000>; +- }; +- +- dma: dma@7e007000 { +- compatible = "brcm,bcm2835-dma"; +- reg = <0x7e007000 0xf00>; +- interrupts = <1 16>, +- <1 17>, +- <1 18>, +- <1 19>, +- <1 20>, +- <1 21>, +- <1 22>, +- <1 23>, +- <1 24>, +- <1 25>, +- <1 26>, +- <1 27>, +- <1 28>; +- +- #dma-cells = <1>; +- brcm,dma-channel-mask = <0x7f35>; +- }; +- +- intc: interrupt-controller@7e00b200 { +- compatible = "brcm,bcm2835-armctrl-ic"; +- reg = <0x7e00b200 0x200>; +- interrupt-controller; +- #interrupt-cells = <2>; +- }; +- +- watchdog@7e100000 { +- compatible = "brcm,bcm2835-pm-wdt"; +- reg = <0x7e100000 0x28>; +- }; +- +- clocks: cprman@7e101000 { +- compatible = "brcm,bcm2835-cprman"; +- #clock-cells = <1>; +- reg = <0x7e101000 0x2000>; +- +- /* CPRMAN derives everything from the platform's +- * oscillator. +- */ +- clocks = <&clk_osc>; +- }; +- +- rng@7e104000 { +- compatible = "brcm,bcm2835-rng"; +- reg = <0x7e104000 0x10>; +- }; +- +- mailbox: mailbox@7e00b800 { +- compatible = "brcm,bcm2835-mbox"; +- reg = <0x7e00b880 0x40>; +- interrupts = <0 1>; +- #mbox-cells = <0>; +- }; +- +- gpio: gpio@7e200000 { +- compatible = "brcm,bcm2835-gpio"; +- reg = <0x7e200000 0xb4>; +- /* +- * The GPIO IP block is designed for 3 banks of GPIOs. +- * Each bank has a GPIO interrupt for itself. +- * There is an overall "any bank" interrupt. +- * In order, these are GIC interrupts 17, 18, 19, 20. +- * Since the BCM2835 only has 2 banks, the 2nd bank +- * interrupt output appears to be mirrored onto the +- * 3rd bank's interrupt signal. +- * So, a bank0 interrupt shows up on 17, 20, and +- * a bank1 interrupt shows up on 18, 19, 20! +- */ +- interrupts = <2 17>, <2 18>, <2 19>, <2 20>; +- +- gpio-controller; +- #gpio-cells = <2>; +- +- interrupt-controller; +- #interrupt-cells = <2>; +- }; +- +- uart0: uart@7e201000 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201000 0x1000>; +- interrupts = <2 25>; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- }; +- +- i2s: i2s@7e203000 { +- compatible = "brcm,bcm2835-i2s"; +- reg = <0x7e203000 0x20>, +- <0x7e101098 0x02>; +- +- dmas = <&dma 2>, +- <&dma 3>; +- dma-names = "tx", "rx"; +- status = "disabled"; +- }; +- +- spi: spi@7e204000 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204000 0x1000>; +- interrupts = <2 22>; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c0: i2c@7e205000 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205000 0x1000>; +- interrupts = <2 21>; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- sdhci: sdhci@7e300000 { +- compatible = "brcm,bcm2835-sdhci"; +- reg = <0x7e300000 0x100>; +- interrupts = <2 30>; +- clocks = <&clocks BCM2835_CLOCK_EMMC>; +- status = "disabled"; +- }; +- +- i2c1: i2c@7e804000 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e804000 0x1000>; +- interrupts = <2 21>; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c2: i2c@7e805000 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e805000 0x1000>; +- interrupts = <2 21>; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- usb@7e980000 { +- compatible = "brcm,bcm2835-usb"; +- reg = <0x7e980000 0x10000>; +- interrupts = <1 9>; +- }; +- + arm-pmu { + compatible = "arm,arm1176-pmu"; + }; + }; +- +- clocks { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- /* The oscillator is the root of the clock tree. */ +- clk_osc: clock@3 { +- compatible = "fixed-clock"; +- reg = <3>; +- #clock-cells = <0>; +- clock-output-names = "osc"; +- clock-frequency = <19200000>; +- }; +- +- }; + }; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +new file mode 100644 +index 000000000000..bf74e8afbe88 +--- /dev/null ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -0,0 +1,209 @@ ++#include <dt-bindings/pinctrl/bcm2835.h> ++#include <dt-bindings/clock/bcm2835.h> ++#include "skeleton.dtsi" ++ ++/* This include file covers the common peripherals and configuration between ++ * bcm2835 and bcm2836 implementations, leaving the CPU configuration to ++ * bcm2835.dtsi and bcm2836.dtsi. ++ */ ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ model = "BCM2835"; ++ interrupt-parent = <&intc>; ++ ++ chosen { ++ bootargs = "earlyprintk console=ttyAMA0"; ++ }; ++ ++ soc { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ timer@7e003000 { ++ compatible = "brcm,bcm2835-system-timer"; ++ reg = <0x7e003000 0x1000>; ++ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; ++ /* This could be a reference to BCM2835_CLOCK_TIMER, ++ * but we don't have the driver using the common clock ++ * support yet. ++ */ ++ clock-frequency = <1000000>; ++ }; ++ ++ dma: dma@7e007000 { ++ compatible = "brcm,bcm2835-dma"; ++ reg = <0x7e007000 0xf00>; ++ interrupts = <1 16>, ++ <1 17>, ++ <1 18>, ++ <1 19>, ++ <1 20>, ++ <1 21>, ++ <1 22>, ++ <1 23>, ++ <1 24>, ++ <1 25>, ++ <1 26>, ++ <1 27>, ++ <1 28>; ++ ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x7f35>; ++ }; ++ ++ intc: interrupt-controller@7e00b200 { ++ compatible = "brcm,bcm2835-armctrl-ic"; ++ reg = <0x7e00b200 0x200>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ watchdog@7e100000 { ++ compatible = "brcm,bcm2835-pm-wdt"; ++ reg = <0x7e100000 0x28>; ++ }; ++ ++ clocks: cprman@7e101000 { ++ compatible = "brcm,bcm2835-cprman"; ++ #clock-cells = <1>; ++ reg = <0x7e101000 0x2000>; ++ ++ /* CPRMAN derives everything from the platform's ++ * oscillator. ++ */ ++ clocks = <&clk_osc>; ++ }; ++ ++ rng@7e104000 { ++ compatible = "brcm,bcm2835-rng"; ++ reg = <0x7e104000 0x10>; ++ }; ++ ++ mailbox: mailbox@7e00b800 { ++ compatible = "brcm,bcm2835-mbox"; ++ reg = <0x7e00b880 0x40>; ++ interrupts = <0 1>; ++ #mbox-cells = <0>; ++ }; ++ ++ gpio: gpio@7e200000 { ++ compatible = "brcm,bcm2835-gpio"; ++ reg = <0x7e200000 0xb4>; ++ /* ++ * The GPIO IP block is designed for 3 banks of GPIOs. ++ * Each bank has a GPIO interrupt for itself. ++ * There is an overall "any bank" interrupt. ++ * In order, these are GIC interrupts 17, 18, 19, 20. ++ * Since the BCM2835 only has 2 banks, the 2nd bank ++ * interrupt output appears to be mirrored onto the ++ * 3rd bank's interrupt signal. ++ * So, a bank0 interrupt shows up on 17, 20, and ++ * a bank1 interrupt shows up on 18, 19, 20! ++ */ ++ interrupts = <2 17>, <2 18>, <2 19>, <2 20>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ uart0: uart@7e201000 { ++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ reg = <0x7e201000 0x1000>; ++ interrupts = <2 25>; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ }; ++ ++ i2s: i2s@7e203000 { ++ compatible = "brcm,bcm2835-i2s"; ++ reg = <0x7e203000 0x20>, ++ <0x7e101098 0x02>; ++ ++ dmas = <&dma 2>, ++ <&dma 3>; ++ dma-names = "tx", "rx"; ++ status = "disabled"; ++ }; ++ ++ spi: spi@7e204000 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204000 0x1000>; ++ interrupts = <2 22>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c0: i2c@7e205000 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e205000 0x1000>; ++ interrupts = <2 21>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ sdhci: sdhci@7e300000 { ++ compatible = "brcm,bcm2835-sdhci"; ++ reg = <0x7e300000 0x100>; ++ interrupts = <2 30>; ++ clocks = <&clocks BCM2835_CLOCK_EMMC>; ++ status = "disabled"; ++ }; ++ ++ i2c1: i2c@7e804000 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e804000 0x1000>; ++ interrupts = <2 21>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c2: i2c@7e805000 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e805000 0x1000>; ++ interrupts = <2 21>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ usb@7e980000 { ++ compatible = "brcm,bcm2835-usb"; ++ reg = <0x7e980000 0x10000>; ++ interrupts = <1 9>; ++ }; ++ ++ arm-pmu { ++ compatible = "arm,arm1176-pmu"; ++ }; ++ }; ++ ++ clocks { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* The oscillator is the root of the clock tree. */ ++ clk_osc: clock@3 { ++ compatible = "fixed-clock"; ++ reg = <3>; ++ #clock-cells = <0>; ++ clock-output-names = "osc"; ++ clock-frequency = <19200000>; ++ }; ++ ++ }; ++}; |