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authorSascha Hauer <s.hauer@pengutronix.de>2019-09-09 14:18:09 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-10-01 22:34:08 +0200
commitc123df1fc8b57b52d81cc462c084eb0fb09a0d8a (patch)
tree2a2be8e515b84d1036d4e8d8963e063c00a2189f /arch/arm/boards/canon-a1100/lowlevel.c
parent9d7a00bd45a0d7a4fc2110251916abb3dc555fd4 (diff)
downloadbarebox-c123df1fc8b57b52d81cc462c084eb0fb09a0d8a.tar.gz
barebox-c123df1fc8b57b52d81cc462c084eb0fb09a0d8a.tar.xz
ARM: drop bultin DTB
We can build multiple DTBs into the binary and board code can select which one to use. Drop the single builtin DTB and let the boards using it pass the correct one. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/canon-a1100/lowlevel.c')
-rw-r--r--arch/arm/boards/canon-a1100/lowlevel.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boards/canon-a1100/lowlevel.c b/arch/arm/boards/canon-a1100/lowlevel.c
index 744ce59eaa..b75a1bfa60 100644
--- a/arch/arm/boards/canon-a1100/lowlevel.c
+++ b/arch/arm/boards/canon-a1100/lowlevel.c
@@ -3,10 +3,16 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+extern char __dtb_canon_a1100_start[];
+
void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
{
+ void *fdt;
+
arm_cpu_lowlevel_init();
+ fdt = __dtb_canon_a1100_start + get_runtime_offset();
+
/* FIXME: can we determine RAM size using CP15 register?
*
* see http://chdk.setepontos.com/index.php?topic=5980.90
@@ -19,5 +25,6 @@ void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
* The Control Register value (mrc p15, 0, %0, c0, c1, 4)
* is 0x00051078.
*/
- barebox_arm_entry(0x0, SZ_64M, 0);
+
+ barebox_arm_entry(0x0, SZ_64M, fdt);
}