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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-05 12:59:29 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-05 12:59:29 +0200 |
| commit | b40aeb00d32f07c5b1b617ea4e88032cb895d8b3 (patch) | |
| tree | f4161ad66628cd2c2733161d90c18bfa69eb5d8a /arch/arm/boards/panda | |
| parent | 6cb993c0cd0644d7b559cda6b84e4c196fc029dc (diff) | |
| parent | 466b62f4f3ed361c0e60c8e345ffe2cb0733594e (diff) | |
| download | barebox-b40aeb00d32f07c5b1b617ea4e88032cb895d8b3.tar.gz barebox-b40aeb00d32f07c5b1b617ea4e88032cb895d8b3.tar.xz | |
Merge branch 'for-next/omap'
Diffstat (limited to 'arch/arm/boards/panda')
| -rw-r--r-- | arch/arm/boards/panda/lowlevel.c | 4 | ||||
| -rw-r--r-- | arch/arm/boards/panda/mux.c | 8 |
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c index 8591fff053..0b4b199d34 100644 --- a/arch/arm/boards/panda/lowlevel.c +++ b/arch/arm/boards/panda/lowlevel.c @@ -28,6 +28,8 @@ #include <mach/syslib.h> #include <asm/barebox-arm.h> +#define TPS62361_VSEL0_GPIO 7 + void set_muxconf_regs(void); static const struct ddr_regs ddr_regs_400_mhz_2cs = { @@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void) omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core); /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - omap4_scale_vcores(); + omap4_scale_vcores(TPS62361_VSEL0_GPIO); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c index 310e43372f..3783006ad6 100644 --- a/arch/arm/boards/panda/mux.c +++ b/arch/arm/boards/panda/mux.c @@ -3,6 +3,7 @@ #include <io.h> #include <mach/omap4-silicon.h> #include <mach/omap4-mux.h> +#include <mach/omap4-clock.h> static const struct pad_conf_entry core_padconf_array[] = { { GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1 /* sdmmc2_dat0 */ }, @@ -245,4 +246,11 @@ void set_muxconf_regs(void) omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); + + /* gpio_wk7 is used for controlling TPS on 4460 */ + if (omap4_revision() >= OMAP4460_ES1_0) { + writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ); + /* Enable GPIO-1 clocks before TPS initialization */ + omap4_enable_gpio1_wup_clocks(); + } } |