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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2014-12-05 17:41:48 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2014-12-08 08:44:08 +0100
commite4fc177199fe2f918160b359d3c5824f5b386f7b (patch)
tree915fd843f96476a7a2ed420811bd391b25b2eaeb /arch/arm/boards/terasic-sockit/sequencer_defines.h
parent24532c33fcdddb4417368786ef06a80555fe4f05 (diff)
downloadbarebox-e4fc177199fe2f918160b359d3c5824f5b386f7b.tar.gz
barebox-e4fc177199fe2f918160b359d3c5824f5b386f7b.tar.xz
ARM: socfpga: sockit: update handoff files to 14.0
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/terasic-sockit/sequencer_defines.h')
-rw-r--r--arch/arm/boards/terasic-sockit/sequencer_defines.h44
1 files changed, 43 insertions, 1 deletions
diff --git a/arch/arm/boards/terasic-sockit/sequencer_defines.h b/arch/arm/boards/terasic-sockit/sequencer_defines.h
index a3cd7a87d7..f4d43951c8 100644
--- a/arch/arm/boards/terasic-sockit/sequencer_defines.h
+++ b/arch/arm/boards/terasic-sockit/sequencer_defines.h
@@ -1,3 +1,31 @@
+/*
+Copyright (c) 2012, Altera Corporation
+All rights reserved.
+
+SPDX-License-Identifier: BSD-3-Clause
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ * Neither the name of Altera Corporation nor the
+ names of its contributors may be used to endorse or promote products
+ derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL ALTERA CORPORATION BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
#ifndef _SEQUENCER_DEFINES_H_
#define _SEQUENCER_DEFINES_H_
@@ -30,6 +58,7 @@
#define DM_PINS_ENABLED 1
#define ENABLE_ASSERT 0
#define ENABLE_BRINGUP_DEBUGGING 0
+#define ENABLE_DELAY_CHAIN_WRITE 0
#define ENABLE_DQS_IN_CENTERING 1
#define ENABLE_DQS_OUT_CENTERING 0
#define ENABLE_EXPORT_SEQ_DEBUG_BRIDGE 0
@@ -38,6 +67,7 @@
#define ENABLE_NON_DESTRUCTIVE_CALIB 0
#define ENABLE_SUPER_QUICK_CALIBRATION 0
#define ENABLE_TCL_DEBUG 0
+#define FAKE_CAL_FAIL 0
#define FULL_RATE 1
#define GUARANTEED_READ_BRINGUP_TEST 0
#define HALF_RATE 0
@@ -69,9 +99,13 @@
#define LPDDR1 0
#define LPDDR2 0
#define LRDIMM 0
+#define M10_DQ_WIDTH_8 0
+#define M10_DQ_WIDTH_16 0
+#define M10_DQ_WIDTH_24 0
#define MARGIN_VARIATION_TEST 0
#define MAX_LATENCY_COUNT_WIDTH 5
#define MEM_ADDR_WIDTH 13
+#define MRS_MIRROR_PING_PONG_ATSO 0
#define MULTIPLE_AFI_WLAT 0
#define NUM_SHADOW_REGS 1
#define QDRII 0
@@ -79,7 +113,7 @@
#define RDIMM 0
#define READ_AFTER_WRITE_CALIBRATION 1
#define READ_VALID_FIFO_SIZE 16
-#define REG_FILE_INIT_SEQ_SIGNATURE 0x55550483
+#define REG_FILE_INIT_SEQ_SIGNATURE 0x5555048c
#define RLDRAM3 0
#define RLDRAMII 0
#define RLDRAMX 0
@@ -110,9 +144,17 @@
#define STATIC_SIM_FILESET 0
#define STATIC_SKIP_MEM_INIT 0
#define STRATIXV 0
+#define TINIT_CNTR1_VAL 32
+#define TINIT_CNTR2_VAL 32
+#define TINIT_CNTR0_VAL 99
#define TRACKING_ERROR_TEST 0
#define TRACKING_WATCH_TEST 0
+#define TRESET_CNTR1_VAL 99
+#define TRESET_CNTR2_VAL 10
+#define TRESET_CNTR0_VAL 99
+#define TW0_CAPTURE_CLOCKS 0
#define USE_DQS_TRACKING 1
#define USE_SHADOW_REGS 0
+#define USE_USER_RDIMM_VALUE 0
#endif /* _SEQUENCER_DEFINES_H_ */