diff options
| author | Lucas Stach <l.stach@pengutronix.de> | 2018-11-01 10:18:38 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-02 07:24:15 +0100 |
| commit | 41292192c01bc17b7c53642d66e434ce24eb3f25 (patch) | |
| tree | 16dfa395048517791995147d0a6328e8a85c0ff6 /arch/arm/cpu | |
| parent | d34e8630185179ebf7ccbdbd15f2dc7d44486476 (diff) | |
| download | barebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.gz barebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.xz | |
ARM: safely switch from HYP to SVC mode if required
This is a port of the Linux safe_svcmode_maskall macro to
the Barebox lowlevel init.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Roland Hieber <r.hieber@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/lowlevel.S | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index 7696a198e7..43665981e4 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -1,16 +1,28 @@ #include <linux/linkage.h> #include <init.h> #include <asm/system.h> +#include <asm/opcodes-virt.h> .section ".text_bare_init_","ax" ENTRY(arm_cpu_lowlevel_init) /* save lr, since it may be banked away with a processor mode change */ mov r2, lr + /* set the cpu to SVC32 mode, mask irq and fiq */ mrs r12, cpsr - bic r12, r12, #0x1f - orr r12, r12, #0xd3 - msr cpsr, r12 + eor r12, r12, #HYP_MODE + tst r12, #MODE_MASK + bic r12, r12, #MODE_MASK + orr r12, r12, #(PSR_I_BIT | PSR_F_BIT | SVC_MODE) +THUMB( orr r12, r12, #PSR_T_BIT ) + bne 1f + orr r12, r12, #PSR_A_BIT + adr lr, 2f + msr spsr_cxsf, r12 + __MSR_ELR_HYP(14) + __ERET +1: msr cpsr_c, r12 +2: #if __LINUX_ARM_ARCH__ >= 6 /* |