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| author | Juergen Beisert <jbe@pengutronix.de> | 2012-07-28 17:10:44 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-07-30 11:35:23 +0200 |
| commit | 32eca5b3b8f903d43a39e46e7d009b3e64e01049 (patch) | |
| tree | 8ae12b8c7f8e31a2ff8dbe58a5cce88d45055fd4 /arch/arm/mach-samsung | |
| parent | 63f57091f2e60e9b1db9a143efaa03ac26710682 (diff) | |
| download | barebox-32eca5b3b8f903d43a39e46e7d009b3e64e01049.tar.gz barebox-32eca5b3b8f903d43a39e46e7d009b3e64e01049.tar.xz | |
ARM/Samsung: adapt the generic timer driver to support the S3C6410 SoC
The S3C64XX SoC has a real 32 bit counter, but almost the same style of
registers. It's enough to change the parameters, to get the routines work on
this SoC.
sha: s5p timer works like s3c64xx, so use #else to cover this.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-samsung')
| -rw-r--r-- | arch/arm/mach-samsung/s3c-timer.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c index 6665c8c3d5..fb3cda074f 100644 --- a/arch/arm/mach-samsung/s3c-timer.c +++ b/arch/arm/mach-samsung/s3c-timer.c @@ -37,11 +37,19 @@ #define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c) #define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40) -#define TIMER_WIDTH 16 -#define TIMER_SHIFT 10 -#define PRE_MUX 3 -#define PRE_MUX_ADD 1 +#ifdef CONFIG_ARCH_S3C24xx +# define TIMER_WIDTH 16 +# define TIMER_SHIFT 10 +# define PRE_MUX 3 +# define PRE_MUX_ADD 1 static const uint32_t max = 0x0000ffff; +#else /* for S3C64xx and S5Pxx */ +# define TIMER_WIDTH 32 +# define TIMER_SHIFT 10 +# define PRE_MUX 4 +# define PRE_MUX_ADD 0 +static const uint32_t max = ~0; +#endif static void s3c_init_t4_clk_source(void) { |