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author | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-09-11 10:15:32 +0200 |
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committer | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-09-11 10:15:32 +0200 |
commit | 97c0278dc1cdef940d837be932a284c2bd7f4d35 (patch) | |
tree | bd0de4b1543c47e6368cd3feaa4b20b2b4c20ed8 /arch/blackfin/lib/clock.c | |
parent | 6402a7d5b747008c5b13d8e62d97493b9f852700 (diff) | |
download | barebox-97c0278dc1cdef940d837be932a284c2bd7f4d35.tar.gz barebox-97c0278dc1cdef940d837be932a284c2bd7f4d35.tar.xz |
initial blackfin support
Diffstat (limited to 'arch/blackfin/lib/clock.c')
-rw-r--r-- | arch/blackfin/lib/clock.c | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/arch/blackfin/lib/clock.c b/arch/blackfin/lib/clock.c new file mode 100644 index 0000000000..71fccfeb4a --- /dev/null +++ b/arch/blackfin/lib/clock.c @@ -0,0 +1,79 @@ + +#include <common.h> +#include <clock.h> +#include <init.h> +#include <asm/blackfin.h> +#include <asm/cpu/cdef_LPBlackfin.h> + +static ulong get_vco(void) +{ + ulong msel; + ulong vco; + + msel = (*pPLL_CTL >> 9) & 0x3F; + if (0 == msel) + msel = 64; + + vco = CONFIG_CLKIN_HZ; + vco >>= (1 & *pPLL_CTL); /* DF bit */ + vco = msel * vco; + return vco; +} + +/* Get the Core clock */ +ulong get_cclk(void) +{ + ulong csel, ssel; + if (*pPLL_STAT & 0x1) + return CONFIG_CLKIN_HZ; + + ssel = *pPLL_DIV; + csel = ((ssel >> 4) & 0x03); + ssel &= 0xf; + if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */ + return get_vco() / ssel; + return get_vco() >> csel; +} + +/* Get the System clock */ +ulong get_sclk(void) +{ + ulong ssel; + + if (*pPLL_STAT & 0x1) + return CONFIG_CLKIN_HZ; + + ssel = (*pPLL_DIV & 0xf); + + return get_vco() / ssel; +} + +uint64_t blackfin_clocksource_read(void) +{ + return ~(*pTCOUNT); +} + +static struct clocksource cs = { + .read = blackfin_clocksource_read, + .mask = 0xffffffff, + .shift = 10, +}; + +static int clocksource_init (void) +{ + *pTCNTL = 0x1; + *pTSCALE = 0x0; + *pTCOUNT = ~0; + *pTPERIOD = ~0; + *pTCNTL = 0x7; + asm("CSYNC;"); + + cs.mult = clocksource_hz2mult(get_cclk(), cs.shift); + + init_clock(&cs); + + return 0; +} + +core_initcall(clocksource_init); + |