diff options
| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2020-08-20 09:34:53 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-08-24 08:49:36 +0200 |
| commit | 761cb5cd15c1006e7137f9f2165de741f938ad74 (patch) | |
| tree | 4d62cd1dc97d5f815edbc324fc8a3b4e7fc82036 /arch | |
| parent | 65a271b643b46c667ba3985f5f9df6b472203581 (diff) | |
| download | barebox-761cb5cd15c1006e7137f9f2165de741f938ad74.tar.gz barebox-761cb5cd15c1006e7137f9f2165de741f938ad74.tar.xz | |
ARM: dts: protonic: properly define PHY nodes on lanmcu and plym2m boards
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/imx6dl-lanmcu.dts | 15 | ||||
| -rw-r--r-- | arch/arm/dts/imx6dl-plym2m.dts | 15 |
2 files changed, 28 insertions, 2 deletions
diff --git a/arch/arm/dts/imx6dl-lanmcu.dts b/arch/arm/dts/imx6dl-lanmcu.dts index 42f8c91ece..67139930f9 100644 --- a/arch/arm/dts/imx6dl-lanmcu.dts +++ b/arch/arm/dts/imx6dl-lanmcu.dts @@ -308,12 +308,25 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&clk50m_phy>; clock-names = "ipg", "ahb", "ptp"; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + /* Microchip KSZ8081RNA PHY */ + rgmii_phy: ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <300>; + }; + }; }; &uart2 { diff --git a/arch/arm/dts/imx6dl-plym2m.dts b/arch/arm/dts/imx6dl-plym2m.dts index d04137e282..e944a14dce 100644 --- a/arch/arm/dts/imx6dl-plym2m.dts +++ b/arch/arm/dts/imx6dl-plym2m.dts @@ -54,12 +54,25 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&clk50m_phy>; clock-names = "ipg", "ahb", "ptp"; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + /* Microchip KSZ8081RNA PHY */ + rgmii_phy: ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <300>; + }; + }; }; &iomuxc { |