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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
| commit | a4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch) | |
| tree | ef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/arm/pmu.txt | |
| parent | 83e61900b02965d01f0885e2db2077df35be7f56 (diff) | |
| download | barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.xz | |
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/pmu.txt')
| -rw-r--r-- | dts/Bindings/arm/pmu.txt | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt index 56518839f5..6eb73be943 100644 --- a/dts/Bindings/arm/pmu.txt +++ b/dts/Bindings/arm/pmu.txt @@ -25,6 +25,7 @@ Required properties: "qcom,scorpion-pmu" "qcom,scorpion-mp-pmu" "qcom,krait-pmu" + "cavium,thunder-pmu" - interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu interrupt (PPI) then 1 interrupt should be specified. @@ -46,6 +47,16 @@ Optional properties: - qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd events. +- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register + (SDER) is accessible. This will cause the driver to do + any setup required that is only possible in ARMv7 secure + state. If not present the ARMv7 SDER will not be touched, + which means the PMU may fail to operate unless external + code (bootloader or security monitor) has performed the + appropriate initialisation. Note that this property is + not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux + in Non-secure state. + Example: pmu { |