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authorSascha Hauer <s.hauer@pengutronix.de>2020-02-14 09:05:53 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-02-18 08:32:25 +0100
commit81ce4a7dec8ba066c73692e10634091b14c1e494 (patch)
treed61574b25fda47711e3efab57c7a5739de477565 /dts/Bindings/clock/qcom,sdm845-videocc.yaml
parent84b7f86bef670f6751d67131738555fa53ca3f6b (diff)
downloadbarebox-81ce4a7dec8ba066c73692e10634091b14c1e494.tar.gz
barebox-81ce4a7dec8ba066c73692e10634091b14c1e494.tar.xz
dts: update to v5.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Video Clock & Reset Controller Binding for SDM845
+
+maintainers:
+ - Taniya Das <tdas@codeaurora.org>
+
+description: |
+ Qualcomm video clock control module which supports the clocks, resets and
+ power domains on SDM845.
+
+ See also dt-bindings/clock/qcom,videocc-sdm845.h.
+
+properties:
+ compatible:
+ const: qcom,sdm845-videocc
+
+ clocks:
+ items:
+ - description: Board XO source
+
+ clock-names:
+ items:
+ - const: bi_tcxo
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+ - '#reset-cells'
+ - '#power-domain-cells'
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ clock-controller@ab00000 {
+ compatible = "qcom,sdm845-videocc";
+ reg = <0 0x0ab00000 0 0x10000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "bi_tcxo";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+...