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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
commit | ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba (patch) | |
tree | 031d15dcd26f5b737adddc5042a3ddabbb6051f7 /dts/Bindings/crypto | |
parent | 15af9fc8cc9e18409893d2375271d64cac76924a (diff) | |
download | barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.gz barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.xz |
dts: update to v4.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/crypto')
-rw-r--r-- | dts/Bindings/crypto/artpec6-crypto.txt | 16 | ||||
-rw-r--r-- | dts/Bindings/crypto/atmel-crypto.txt | 13 | ||||
-rw-r--r-- | dts/Bindings/crypto/fsl-dcp.txt | 1 | ||||
-rw-r--r-- | dts/Bindings/crypto/inside-secure-safexcel.txt | 1 | ||||
-rw-r--r-- | dts/Bindings/crypto/marvell-cesa.txt | 1 | ||||
-rw-r--r-- | dts/Bindings/crypto/mv_cesa.txt | 1 | ||||
-rw-r--r-- | dts/Bindings/crypto/rockchip-crypto.txt | 1 | ||||
-rw-r--r-- | dts/Bindings/crypto/st,stm32-hash.txt | 30 |
8 files changed, 59 insertions, 5 deletions
diff --git a/dts/Bindings/crypto/artpec6-crypto.txt b/dts/Bindings/crypto/artpec6-crypto.txt new file mode 100644 index 0000000000..d9cca4875b --- /dev/null +++ b/dts/Bindings/crypto/artpec6-crypto.txt @@ -0,0 +1,16 @@ +Axis crypto engine with PDMA interface. + +Required properties: +- compatible : Should be one of the following strings: + "axis,artpec6-crypto" for the version in the Axis ARTPEC-6 SoC + "axis,artpec7-crypto" for the version in the Axis ARTPEC-7 SoC. +- reg: Base address and size for the PDMA register area. +- interrupts: Interrupt handle for the PDMA interrupt line. + +Example: + +crypto@f4264000 { + compatible = "axis,artpec6-crypto"; + reg = <0xf4264000 0x1000>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; +}; diff --git a/dts/Bindings/crypto/atmel-crypto.txt b/dts/Bindings/crypto/atmel-crypto.txt index f2aab3dc2b..7de1a9674c 100644 --- a/dts/Bindings/crypto/atmel-crypto.txt +++ b/dts/Bindings/crypto/atmel-crypto.txt @@ -66,3 +66,16 @@ sha@f8034000 { dmas = <&dma1 2 17>; dma-names = "tx"; }; + +* Eliptic Curve Cryptography (I2C) + +Required properties: +- compatible : must be "atmel,atecc508a". +- reg: I2C bus address of the device. +- clock-frequency: must be present in the i2c controller node. + +Example: +atecc508a@C0 { + compatible = "atmel,atecc508a"; + reg = <0xC0>; +}; diff --git a/dts/Bindings/crypto/fsl-dcp.txt b/dts/Bindings/crypto/fsl-dcp.txt index 6949e50f1f..76a0b4e80e 100644 --- a/dts/Bindings/crypto/fsl-dcp.txt +++ b/dts/Bindings/crypto/fsl-dcp.txt @@ -13,5 +13,4 @@ dcp@80028000 { compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; reg = <0x80028000 0x2000>; interrupts = <52 53>; - status = "okay"; }; diff --git a/dts/Bindings/crypto/inside-secure-safexcel.txt b/dts/Bindings/crypto/inside-secure-safexcel.txt index 941bb6a6fb..fbc07d1232 100644 --- a/dts/Bindings/crypto/inside-secure-safexcel.txt +++ b/dts/Bindings/crypto/inside-secure-safexcel.txt @@ -23,5 +23,4 @@ Example: interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&cpm_syscon0 1 26>; - status = "disabled"; }; diff --git a/dts/Bindings/crypto/marvell-cesa.txt b/dts/Bindings/crypto/marvell-cesa.txt index c6c6a4a045..28d3f2496b 100644 --- a/dts/Bindings/crypto/marvell-cesa.txt +++ b/dts/Bindings/crypto/marvell-cesa.txt @@ -41,5 +41,4 @@ Examples: clock-names = "cesa0", "cesa1"; marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>; marvell,crypto-sram-size = <0x600>; - status = "okay"; }; diff --git a/dts/Bindings/crypto/mv_cesa.txt b/dts/Bindings/crypto/mv_cesa.txt index c0c35f0033..d9b92e2f31 100644 --- a/dts/Bindings/crypto/mv_cesa.txt +++ b/dts/Bindings/crypto/mv_cesa.txt @@ -29,5 +29,4 @@ Examples: interrupts = <22>; marvell,crypto-srams = <&crypto_sram>; marvell,crypto-sram-size = <0x600>; - status = "okay"; }; diff --git a/dts/Bindings/crypto/rockchip-crypto.txt b/dts/Bindings/crypto/rockchip-crypto.txt index 096df34b11..5e2ba385b8 100644 --- a/dts/Bindings/crypto/rockchip-crypto.txt +++ b/dts/Bindings/crypto/rockchip-crypto.txt @@ -25,5 +25,4 @@ Examples: clock-names = "aclk", "hclk", "sclk", "apb_pclk"; resets = <&cru SRST_CRYPTO>; reset-names = "crypto-rst"; - status = "okay"; }; diff --git a/dts/Bindings/crypto/st,stm32-hash.txt b/dts/Bindings/crypto/st,stm32-hash.txt new file mode 100644 index 0000000000..04fc246f02 --- /dev/null +++ b/dts/Bindings/crypto/st,stm32-hash.txt @@ -0,0 +1,30 @@ +* STMicroelectronics STM32 HASH + +Required properties: +- compatible: Should contain entries for this and backward compatible + HASH versions: + - "st,stm32f456-hash" for stm32 F456. + - "st,stm32f756-hash" for stm32 F756. +- reg: The address and length of the peripheral registers space +- interrupts: the interrupt specifier for the HASH +- clocks: The input clock of the HASH instance + +Optional properties: +- resets: The input reset of the HASH instance +- dmas: DMA specifiers for the HASH. See the DMA client binding, + Documentation/devicetree/bindings/dma/dma.txt +- dma-names: DMA request name. Should be "in" if a dma is present. +- dma-maxburst: Set number of maximum dma burst supported + +Example: + +hash1: hash@50060400 { + compatible = "st,stm32f756-hash"; + reg = <0x50060400 0x400>; + interrupts = <80>; + clocks = <&rcc 0 STM32F7_AHB2_CLOCK(HASH)>; + resets = <&rcc STM32F7_AHB2_RESET(HASH)>; + dmas = <&dma2 7 2 0x400 0x0>; + dma-names = "in"; + dma-maxburst = <0>; +}; |