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author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-01-04 13:38:22 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-01-05 14:34:10 +0100 |
commit | 2cd77a9163504498827eda901d0cb975c04423b9 (patch) | |
tree | 12f9cd4a2e5e54c5a1a44f293ff114896fcf3bc5 /dts/Bindings/gpio | |
parent | 9dfcb35ec75d263cbe8967d220934125525198ae (diff) | |
download | barebox-2cd77a9163504498827eda901d0cb975c04423b9.tar.gz barebox-2cd77a9163504498827eda901d0cb975c04423b9.tar.xz |
dts: update to v6.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/gpio')
-rw-r--r-- | dts/Bindings/gpio/gpio-davinci.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/gpio/gpio-latch.yaml | 94 | ||||
-rw-r--r-- | dts/Bindings/gpio/gpio-pca9570.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/gpio/gpio-tpic2810.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/gpio/hisilicon,ascend910-gpio.yaml | 56 | ||||
-rw-r--r-- | dts/Bindings/gpio/ti,omap-gpio.yaml | 2 |
6 files changed, 154 insertions, 3 deletions
diff --git a/dts/Bindings/gpio/gpio-davinci.yaml b/dts/Bindings/gpio/gpio-davinci.yaml index f32e09ef93..10e56cf306 100644 --- a/dts/Bindings/gpio/gpio-davinci.yaml +++ b/dts/Bindings/gpio/gpio-davinci.yaml @@ -35,7 +35,7 @@ properties: gpio-line-names: description: strings describing the names of each gpio line. minItems: 1 - maxItems: 100 + maxItems: 144 "#gpio-cells": const: 2 diff --git a/dts/Bindings/gpio/gpio-latch.yaml b/dts/Bindings/gpio/gpio-latch.yaml new file mode 100644 index 0000000000..1ed82a2ceb --- /dev/null +++ b/dts/Bindings/gpio/gpio-latch.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-latch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO latch controller + +maintainers: + - Sascha Hauer <s.hauer@pengutronix.de> + +description: | + This binding describes a GPIO multiplexer based on latches connected to + other GPIOs, like this: + + CLK0 ----------------------. ,--------. + CLK1 -------------------. `--------|> #0 | + | | | + OUT0 ----------------+--|-----------|D0 Q0|-----|< + OUT1 --------------+-|--|-----------|D1 Q1|-----|< + OUT2 ------------+-|-|--|-----------|D2 Q2|-----|< + OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|< + OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|< + OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|< + OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|< + OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|< + | | | | | | | | | `--------' + | | | | | | | | | + | | | | | | | | | ,--------. + | | | | | | | | `-----------|> #1 | + | | | | | | | | | | + | | | | | | | `--------------|D0 Q0|-----|< + | | | | | | `----------------|D1 Q1|-----|< + | | | | | `------------------|D2 Q2|-----|< + | | | | `--------------------|D3 Q3|-----|< + | | | `----------------------|D4 Q4|-----|< + | | `------------------------|D5 Q5|-----|< + | `--------------------------|D6 Q6|-----|< + `----------------------------|D7 Q7|-----|< + `--------' + + The number of clk-gpios and latched-gpios is not fixed. The actual number + of number of latches and the number of inputs per latch is derived from + the number of GPIOs given in the corresponding device tree properties. + +properties: + compatible: + const: gpio-latch + "#gpio-cells": + const: 2 + + clk-gpios: + description: Array of GPIOs to be used to clock a latch + + latched-gpios: + description: Array of GPIOs to be used as inputs per latch + + setup-duration-ns: + description: Delay in nanoseconds to wait after the latch inputs have been + set up + + clock-duration-ns: + description: Delay in nanoseconds to wait between clock output changes + + gpio-controller: true + + gpio-line-names: true + +required: + - compatible + - "#gpio-cells" + - gpio-controller + - clk-gpios + - latched-gpios + +additionalProperties: false + +examples: + - | + gpio-latch { + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_di_do_leds>; + compatible = "gpio-latch"; + gpio-controller; + setup-duration-ns = <100>; + clock-duration-ns = <100>; + + clk-gpios = <&gpio3 7 0>, <&gpio3 8 0>; + latched-gpios = <&gpio3 21 0>, <&gpio3 22 0>, + <&gpio3 23 0>, <&gpio3 24 0>, + <&gpio3 25 0>, <&gpio3 26 0>, + <&gpio3 27 0>, <&gpio3 28 0>; + }; diff --git a/dts/Bindings/gpio/gpio-pca9570.yaml b/dts/Bindings/gpio/gpio-pca9570.yaml index 1acaa0a3d3..48bf414aa5 100644 --- a/dts/Bindings/gpio/gpio-pca9570.yaml +++ b/dts/Bindings/gpio/gpio-pca9570.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - dlg,slg7xl45106 - nxp,pca9570 - nxp,pca9571 diff --git a/dts/Bindings/gpio/gpio-tpic2810.yaml b/dts/Bindings/gpio/gpio-tpic2810.yaml index cb8a5c376e..157969bc4c 100644 --- a/dts/Bindings/gpio/gpio-tpic2810.yaml +++ b/dts/Bindings/gpio/gpio-tpic2810.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gpio/gpio-tpic2810.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TPIC2810 GPIO controller bindings +title: TPIC2810 GPIO controller maintainers: - Aswath Govindraju <a-govindraju@ti.com> diff --git a/dts/Bindings/gpio/hisilicon,ascend910-gpio.yaml b/dts/Bindings/gpio/hisilicon,ascend910-gpio.yaml new file mode 100644 index 0000000000..735d97d645 --- /dev/null +++ b/dts/Bindings/gpio/hisilicon,ascend910-gpio.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/hisilicon,ascend910-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon common GPIO controller + +maintainers: + - Jay Fang <f.fangjian@huawei.com> + +description: + The HiSilicon common GPIO controller can be used for many different + types of SoC such as Huawei Ascend AI series chips. + +properties: + compatible: + const: hisilicon,ascend910-gpio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + ngpios: + minimum: 1 + maximum: 32 + +required: + - compatible + - reg + - interrupts + - gpio-controller + - "#gpio-cells" + - ngpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpio@840d0000 { + compatible = "hisilicon,ascend910-gpio"; + reg = <0x840d0000 0x1000>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/dts/Bindings/gpio/ti,omap-gpio.yaml b/dts/Bindings/gpio/ti,omap-gpio.yaml index 7087e4a501..bd721c8390 100644 --- a/dts/Bindings/gpio/ti,omap-gpio.yaml +++ b/dts/Bindings/gpio/ti,omap-gpio.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: OMAP GPIO controller bindings +title: OMAP GPIO controller maintainers: - Grygorii Strashko <grygorii.strashko@ti.com> |