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authorSascha Hauer <s.hauer@pengutronix.de>2019-04-05 14:51:56 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-04-08 10:16:55 +0200
commit085594d8fd51379afd94f9b89fcce05ecab02d8d (patch)
treef8007ac06ed951cf8c63b9cedf067264ebac3256 /dts/Bindings/i2c/i2c-sun6i-p2wi.txt
parent6cec968f559cc22939dbe90ebbde245a7e8a85f4 (diff)
downloadbarebox-085594d8fd51379afd94f9b89fcce05ecab02d8d.tar.gz
dts: update to v5.1-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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+
+* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device.
+ - compatible : Should one of the following:
+ - "allwinner,sun6i-a31-p2wi"
+ - interrupts : The interrupt line connected to the P2WI peripheral.
+ - clocks : The gate clk connected to the P2WI peripheral.
+ - resets : The reset line connected to the P2WI peripheral.
+
+Optional properties :
+
+ - clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
+default frequency is 100kHz
+
+A P2WI may contain one child node encoding a P2WI slave device.
+
+Slave device properties:
+ Required properties:
+ - reg : the I2C slave address used during the initialization
+ process to switch from I2C to P2WI mode
+
+Example:
+
+ p2wi@1f03400 {
+ compatible = "allwinner,sun6i-a31-p2wi";
+ reg = <0x01f03400 0x400>;
+ interrupts = <0 39 4>;
+ clocks = <&apb0_gates 3>;
+ clock-frequency = <6000000>;
+ resets = <&apb0_rst 3>;
+
+ axp221: pmic@68 {
+ compatible = "x-powers,axp221";
+ reg = <0x68>;
+
+ /* ... */
+ };
+ };