diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
commit | d9a15385467936649b6c2cfeb7ab377002ddce0f (patch) | |
tree | 39175107fc884a29fbba83f47d104f493833fe19 /dts/Bindings/memory-controllers/omap-gpmc.txt | |
parent | bfe946c9593513b0ad1b440bcd997b263487b945 (diff) | |
download | barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.gz barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.xz |
dts: update to v4.8-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/memory-controllers/omap-gpmc.txt')
-rw-r--r-- | dts/Bindings/memory-controllers/omap-gpmc.txt | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/dts/Bindings/memory-controllers/omap-gpmc.txt b/dts/Bindings/memory-controllers/omap-gpmc.txt index 21055e2102..c1359f4d48 100644 --- a/dts/Bindings/memory-controllers/omap-gpmc.txt +++ b/dts/Bindings/memory-controllers/omap-gpmc.txt @@ -46,6 +46,10 @@ Required properties: 0 maps to GPMC_WAIT0 pin. - gpio-cells: Must be set to 2 +Required properties when using NAND prefetch dma: + - dmas GPMC NAND prefetch dma channel + - dma-names Must be set to "rxtx" + Timing properties for child nodes. All are optional and default to 0. - gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds @@ -137,7 +141,8 @@ Example for an AM33xx board: ti,hwmods = "gpmc"; reg = <0x50000000 0x2000>; interrupts = <100>; - + dmas = <&edma 52 0>; + dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>; |