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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-03-18 07:17:49 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-03-18 07:17:49 +0100 |
| commit | 65984ba7aa462ec08d9828774c3c29386c425472 (patch) | |
| tree | 773bf4958944d9410453bee0371096f4cf5b9ece /dts/Bindings/mtd | |
| parent | 3cc8238ef792f4681eff28d408166f14552b0a03 (diff) | |
| download | barebox-65984ba7aa462ec08d9828774c3c29386c425472.tar.gz barebox-65984ba7aa462ec08d9828774c3c29386c425472.tar.xz | |
dts: update to v5.6-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mtd')
| -rw-r--r-- | dts/Bindings/mtd/cadence-nand-controller.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/mtd/cadence-nand-controller.txt b/dts/Bindings/mtd/cadence-nand-controller.txt index f3893c4d3c..d2eada5044 100644 --- a/dts/Bindings/mtd/cadence-nand-controller.txt +++ b/dts/Bindings/mtd/cadence-nand-controller.txt @@ -27,7 +27,7 @@ Required properties of NAND chips: - reg: shall contain the native Chip Select ids from 0 to max supported by the cadence nand flash controller -See Documentation/devicetree/bindings/mtd/nand.txt for more details on +See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on generic bindings. Example: |