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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-21 13:44:30 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-22 08:16:13 +0200 |
| commit | e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e (patch) | |
| tree | be013bf46292f4696ac776bc91c1cf35b7adab24 /dts/Bindings/pci/hisilicon-pcie.txt | |
| parent | fe040e0977fab29216f5039e8f9b04e6dbec859a (diff) | |
| download | barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.gz barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.xz | |
dts: update to v4.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/hisilicon-pcie.txt')
| -rw-r--r-- | dts/Bindings/pci/hisilicon-pcie.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/pci/hisilicon-pcie.txt b/dts/Bindings/pci/hisilicon-pcie.txt index 7bf9df047a..0dcb87d655 100644 --- a/dts/Bindings/pci/hisilicon-pcie.txt +++ b/dts/Bindings/pci/hisilicon-pcie.txt @@ -3,7 +3,7 @@ HiSilicon Hip05 and Hip06 PCIe host bridge DT description HiSilicon PCIe host controller is based on the Synopsys DesignWare PCI core. It shares common functions with the PCIe DesignWare core driver and inherits common properties defined in -Documentation/devicetree/bindings/pci/designware-pci.txt. +Documentation/devicetree/bindings/pci/designware-pcie.txt. Additional properties are described here: |