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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-10-06 06:12:41 +0200 |
commit | ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba (patch) | |
tree | 031d15dcd26f5b737adddc5042a3ddabbb6051f7 /dts/Bindings/pci/kirin-pcie.txt | |
parent | 15af9fc8cc9e18409893d2375271d64cac76924a (diff) | |
download | barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.gz barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.xz |
dts: update to v4.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/kirin-pcie.txt')
-rw-r--r-- | dts/Bindings/pci/kirin-pcie.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/dts/Bindings/pci/kirin-pcie.txt b/dts/Bindings/pci/kirin-pcie.txt index 68ffa0fbcd..6e217c6312 100644 --- a/dts/Bindings/pci/kirin-pcie.txt +++ b/dts/Bindings/pci/kirin-pcie.txt @@ -1,8 +1,8 @@ HiSilicon Kirin SoCs PCIe host DT description -Kirin PCIe host controller is based on Designware PCI core. -It shares common functions with PCIe Designware core driver -and inherits common properties defined in +Kirin PCIe host controller is based on the Synopsys DesignWare PCI core. +It shares common functions with the PCIe DesignWare core driver and +inherits common properties defined in Documentation/devicetree/bindings/pci/designware-pci.txt. Additional properties are described here: @@ -16,7 +16,7 @@ Required properties "apb": apb Ctrl register defined by Kirin; "phy": apb PHY register defined by Kirin; "config": PCIe configuration space registers. -- reset-gpios: The gpio to generate PCIe perst assert and deassert signal. +- reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal. Optional properties: |