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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:26:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:48:45 +0100 |
commit | a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab (patch) | |
tree | 35f886d87a77df7bac8a587a04647691db541a2e /dts/Bindings/spi/spi-armada-3700.txt | |
parent | 81462901ce3d677ce318150f7027e2ce1cf97c41 (diff) | |
download | barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.gz barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.xz |
dts: update to v4.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi/spi-armada-3700.txt')
-rw-r--r-- | dts/Bindings/spi/spi-armada-3700.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/dts/Bindings/spi/spi-armada-3700.txt b/dts/Bindings/spi/spi-armada-3700.txt new file mode 100644 index 0000000000..1564aa8c02 --- /dev/null +++ b/dts/Bindings/spi/spi-armada-3700.txt @@ -0,0 +1,25 @@ +* Marvell Armada 3700 SPI Controller + +Required Properties: + +- compatible: should be "marvell,armada-3700-spi" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: The interrupt number. The interrupt specifier format depends on + the interrupt controller and of its driver. +- clocks: Must contain the clock source, usually from the North Bridge clocks. +- num-cs: The number of chip selects that is supported by this SPI Controller +- #address-cells: should be 1. +- #size-cells: should be 0. + +Example: + + spi0: spi@10600 { + compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + num-cs = <4>; + }; |