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authorSascha Hauer <s.hauer@pengutronix.de>2017-10-06 06:12:41 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2017-10-06 06:12:41 +0200
commitebde8820a04dd73a09f50ba84b8cf8ec3773d6ba (patch)
tree031d15dcd26f5b737adddc5042a3ddabbb6051f7 /dts/Bindings/sram
parent15af9fc8cc9e18409893d2375271d64cac76924a (diff)
downloadbarebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.gz
barebox-ebde8820a04dd73a09f50ba84b8cf8ec3773d6ba.tar.xz
dts: update to v4.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/sram')
-rw-r--r--dts/Bindings/sram/renesas,smp-sram.txt27
-rw-r--r--dts/Bindings/sram/sunxi-sram.txt10
2 files changed, 34 insertions, 3 deletions
diff --git a/dts/Bindings/sram/renesas,smp-sram.txt b/dts/Bindings/sram/renesas,smp-sram.txt
new file mode 100644
index 0000000000..712d05e3e1
--- /dev/null
+++ b/dts/Bindings/sram/renesas,smp-sram.txt
@@ -0,0 +1,27 @@
+* Renesas SMP SRAM
+
+Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
+for secondary CPU bringup and CPU hotplug.
+This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
+Documentation/devicetree/bindings/sram/sram.txt.
+
+Required child node properties:
+ - compatible: Must be "renesas,smp-sram",
+ - reg: Address and length of the reserved SRAM.
+ The full physical (bus) address must be aligned to a 256 KiB boundary.
+
+
+Example:
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0xe63c0000 0x1000>;
+
+ smp-sram@0 {
+ compatible = "renesas,smp-sram";
+ reg = <0 0x10>;
+ };
+ };
diff --git a/dts/Bindings/sram/sunxi-sram.txt b/dts/Bindings/sram/sunxi-sram.txt
index 8d5665468f..6bb92a1df7 100644
--- a/dts/Bindings/sram/sunxi-sram.txt
+++ b/dts/Bindings/sram/sunxi-sram.txt
@@ -9,7 +9,9 @@ Controller Node
---------------
Required properties:
-- compatible : "allwinner,sun4i-a10-sram-controller"
+- compatible : should be:
+ - "allwinner,sun4i-a10-sram-controller"
+ - "allwinner,sun50i-a64-sram-controller"
- reg : sram controller register offset + length
SRAM nodes
@@ -22,10 +24,13 @@ Each SRAM will have SRAM sections that are going to be handled by the
SRAM controller as subnodes. These sections are represented following
once again the representation described in the mmio-sram binding.
-The valid sections compatible are:
+The valid sections compatible for A10 are:
- allwinner,sun4i-a10-sram-a3-a4
- allwinner,sun4i-a10-sram-d
+The valid sections compatible for A64 are:
+ - allwinner,sun50i-a64-sram-c
+
Devices using SRAM sections
---------------------------
@@ -59,7 +64,6 @@ sram-controller@01c00000 {
emac_sram: sram-section@8000 {
compatible = "allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
- status = "disabled";
};
};
};