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authorSascha Hauer <s.hauer@pengutronix.de>2021-05-17 13:27:45 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-05-17 16:23:06 +0200
commita5a4c1d5a3c4f89059fb612b5786ec8b61b959f1 (patch)
treefe87198c6cc02e54d3131d087d2b9f7c3e96c689 /dts/Bindings/thermal
parentba9de18c5f211678f5d0f67a0758c632ab774cca (diff)
downloadbarebox-a5a4c1d5a3c4f89059fb612b5786ec8b61b959f1.tar.gz
barebox-a5a4c1d5a3c4f89059fb612b5786ec8b61b959f1.tar.xz
dts: update to v5.13-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/thermal')
-rw-r--r--dts/Bindings/thermal/brcm,ns-thermal.txt37
-rw-r--r--dts/Bindings/thermal/brcm,ns-thermal.yaml60
-rw-r--r--dts/Bindings/thermal/qcom-spmi-adc-tm5.yaml2
-rw-r--r--dts/Bindings/thermal/qcom-tsens.yaml59
-rw-r--r--dts/Bindings/thermal/rcar-gen3-thermal.yaml43
-rw-r--r--dts/Bindings/thermal/thermal-sensor.yaml3
6 files changed, 149 insertions, 55 deletions
diff --git a/dts/Bindings/thermal/brcm,ns-thermal.txt b/dts/Bindings/thermal/brcm,ns-thermal.txt
deleted file mode 100644
index 68e0471700..0000000000
--- a/dts/Bindings/thermal/brcm,ns-thermal.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-* Broadcom Northstar Thermal
-
-This binding describes thermal sensor that is part of Northstar's DMU (Device
-Management Unit).
-
-Required properties:
-- compatible : Must be "brcm,ns-thermal"
-- reg : iomem address range of PVTMON registers
-- #thermal-sensor-cells : Should be <0>
-
-Example:
-
-thermal: thermal@1800c2c0 {
- compatible = "brcm,ns-thermal";
- reg = <0x1800c2c0 0x10>;
- #thermal-sensor-cells = <0>;
-};
-
-thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <1000>;
- coefficients = <(-556) 418000>;
- thermal-sensors = <&thermal>;
-
- trips {
- cpu-crit {
- temperature = <125000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
-
- cooling-maps {
- };
- };
-};
diff --git a/dts/Bindings/thermal/brcm,ns-thermal.yaml b/dts/Bindings/thermal/brcm,ns-thermal.yaml
new file mode 100644
index 0000000000..fdeb333e01
--- /dev/null
+++ b/dts/Bindings/thermal/brcm,ns-thermal.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom Northstar Thermal
+
+maintainers:
+ - Rafał Miłecki <rafal@milecki.pl>
+
+description:
+ Thermal sensor that is part of Northstar's DMU (Device Management Unit).
+
+allOf:
+ - $ref: thermal-sensor.yaml#
+
+properties:
+ compatible:
+ const: brcm,ns-thermal
+
+ reg:
+ description: PVTMON registers range
+ maxItems: 1
+
+ "#thermal-sensor-cells":
+ const: 0
+
+unevaluatedProperties: false
+
+required:
+ - reg
+
+examples:
+ - |
+ thermal: thermal@1800c2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x1800c2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ coefficients = <(-556) 418000>;
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
diff --git a/dts/Bindings/thermal/qcom-spmi-adc-tm5.yaml b/dts/Bindings/thermal/qcom-spmi-adc-tm5.yaml
index 7cd3644305..3ea8c0c1f4 100644
--- a/dts/Bindings/thermal/qcom-spmi-adc-tm5.yaml
+++ b/dts/Bindings/thermal/qcom-spmi-adc-tm5.yaml
@@ -59,7 +59,6 @@ patternProperties:
properties:
reg:
- $ref: /schemas/types.yaml#/definitions/uint32
description: Specify the sensor channel. There are 8 channels in PMIC5's ADC TM
minimum: 0
maximum: 7
@@ -78,7 +77,6 @@ patternProperties:
also known as absolute calibration.
qcom,hw-settle-time-us:
- $ref: /schemas/types.yaml#/definitions/uint32
description: Time between AMUX getting configured and the ADC starting conversion.
enum: [15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000]
diff --git a/dts/Bindings/thermal/qcom-tsens.yaml b/dts/Bindings/thermal/qcom-tsens.yaml
index 95462e071a..0242fd91b6 100644
--- a/dts/Bindings/thermal/qcom-tsens.yaml
+++ b/dts/Bindings/thermal/qcom-tsens.yaml
@@ -19,9 +19,15 @@ description: |
properties:
compatible:
oneOf:
+ - description: msm9860 TSENS based
+ items:
+ - enum:
+ - qcom,ipq8064-tsens
+
- description: v0.1 of TSENS
items:
- enum:
+ - qcom,mdm9607-tsens
- qcom,msm8916-tsens
- qcom,msm8939-tsens
- qcom,msm8974-tsens
@@ -43,6 +49,7 @@ properties:
- qcom,sdm845-tsens
- qcom,sm8150-tsens
- qcom,sm8250-tsens
+ - qcom,sm8350-tsens
- const: qcom,tsens-v2
reg:
@@ -73,7 +80,9 @@ properties:
maxItems: 2
items:
- const: calib
- - const: calib_sel
+ - enum:
+ - calib_backup
+ - calib_sel
"#qcom,sensors":
description:
@@ -88,12 +97,21 @@ properties:
Number of cells required to uniquely identify the thermal sensors. Since
we have multiple sensors this is set to 1
+required:
+ - compatible
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+ - "#qcom,sensors"
+
allOf:
- if:
properties:
compatible:
contains:
enum:
+ - qcom,ipq8064-tsens
+ - qcom,mdm9607-tsens
- qcom,msm8916-tsens
- qcom,msm8974-tsens
- qcom,msm8976-tsens
@@ -114,19 +132,44 @@ allOf:
interrupt-names:
minItems: 2
-required:
- - compatible
- - reg
- - "#qcom,sensors"
- - interrupts
- - interrupt-names
- - "#thermal-sensor-cells"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,tsens-v0_1
+ - qcom,tsens-v1
+ - qcom,tsens-v2
+
+ then:
+ required:
+ - reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example msm9860 based SoC (ipq8064):
+ gcc: clock-controller {
+
+ /* ... */
+
+ tsens: thermal-sensor {
+ compatible = "qcom,ipq8064-tsens";
+
+ nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+
+ #qcom,sensors = <11>;
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
// Example 1 (legacy: for pre v1 IP):
tsens1: thermal-sensor@900000 {
compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
diff --git a/dts/Bindings/thermal/rcar-gen3-thermal.yaml b/dts/Bindings/thermal/rcar-gen3-thermal.yaml
index b33a76eeac..f963204e0b 100644
--- a/dts/Bindings/thermal/rcar-gen3-thermal.yaml
+++ b/dts/Bindings/thermal/rcar-gen3-thermal.yaml
@@ -28,14 +28,7 @@ properties:
- renesas,r8a77980-thermal # R-Car V3H
- renesas,r8a779a0-thermal # R-Car V3U
- reg:
- minItems: 2
- maxItems: 4
- items:
- - description: TSC1 registers
- - description: TSC2 registers
- - description: TSC3 registers
- - description: TSC4 registers
+ reg: true
interrupts:
items:
@@ -71,8 +64,25 @@ if:
enum:
- renesas,r8a779a0-thermal
then:
+ properties:
+ reg:
+ minItems: 2
+ maxItems: 3
+ items:
+ - description: TSC1 registers
+ - description: TSC2 registers
+ - description: TSC3 registers
required:
- interrupts
+else:
+ properties:
+ reg:
+ items:
+ - description: TSC0 registers
+ - description: TSC1 registers
+ - description: TSC2 registers
+ - description: TSC3 registers
+ - description: TSC4 registers
additionalProperties: false
@@ -111,3 +121,20 @@ examples:
};
};
};
+ - |
+ #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/r8a779a0-sysc.h>
+
+ tsc_r8a779a0: thermal@e6190000 {
+ compatible = "renesas,r8a779a0-thermal";
+ reg = <0xe6190000 0x200>,
+ <0xe6198000 0x200>,
+ <0xe61a0000 0x200>,
+ <0xe61a8000 0x200>,
+ <0xe61b0000 0x200>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
+ #thermal-sensor-cells = <1>;
+ };
diff --git a/dts/Bindings/thermal/thermal-sensor.yaml b/dts/Bindings/thermal/thermal-sensor.yaml
index 9f747921e8..4bd345c71e 100644
--- a/dts/Bindings/thermal/thermal-sensor.yaml
+++ b/dts/Bindings/thermal/thermal-sensor.yaml
@@ -36,6 +36,9 @@ properties:
containing several internal sensors.
enum: [0, 1]
+required:
+ - "#thermal-sensor-cells"
+
additionalProperties: true
examples: