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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
commit | eaa819409db6ac80fbd7c3d36450b2d1bec93576 (patch) | |
tree | 6cd5e0c7f8abe121af237b701ee9e0e1b6f7e40d /dts/Bindings/timer/rockchip,rk3288-timer.txt | |
parent | 0c9aadb6185e1d84746b632284bc89e4e4c80cd3 (diff) | |
download | barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.gz barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.xz |
dts: update to v4.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/timer/rockchip,rk3288-timer.txt')
-rw-r--r-- | dts/Bindings/timer/rockchip,rk3288-timer.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/dts/Bindings/timer/rockchip,rk3288-timer.txt b/dts/Bindings/timer/rockchip,rk3288-timer.txt new file mode 100644 index 0000000000..87f0b0042b --- /dev/null +++ b/dts/Bindings/timer/rockchip,rk3288-timer.txt @@ -0,0 +1,18 @@ +Rockchip rk3288 timer + +Required properties: +- compatible: shall be "rockchip,rk3288-timer" +- reg: base address of the timer register starting with TIMERS CONTROL register +- interrupts: should contain the interrupts for Timer0 +- clocks : must contain an entry for each entry in clock-names +- clock-names : must include the following entries: + "timer", "pclk" + +Example: + timer: timer@ff810000 { + compatible = "rockchip,rk3288-timer"; + reg = <0xff810000 0x20>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&xin24m>, <&cru PCLK_TIMER>; + clock-names = "timer", "pclk"; + }; |