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author | Lucas Stach <l.stach@pengutronix.de> | 2017-07-31 20:03:05 +0200 |
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committer | Lucas Stach <l.stach@pengutronix.de> | 2017-07-31 20:03:05 +0200 |
commit | d14b844b08635c717fb52a294ed8d6872e260315 (patch) | |
tree | 18607dcdd29688b2fa9528f79423183a68e9898d /dts/Bindings/usb | |
parent | 858b797e529e26c19bfa893fdb37ed67ff7a6006 (diff) | |
download | barebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.gz barebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.xz |
dts: update to v4.13-rc2
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'dts/Bindings/usb')
-rw-r--r-- | dts/Bindings/usb/dwc3.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/usb/exynos-usb.txt | 4 | ||||
-rw-r--r-- | dts/Bindings/usb/iproc-udc.txt | 21 | ||||
-rw-r--r-- | dts/Bindings/usb/usb-ohci.txt | 1 |
4 files changed, 28 insertions, 0 deletions
diff --git a/dts/Bindings/usb/dwc3.txt b/dts/Bindings/usb/dwc3.txt index f658f394c2..52fb41046b 100644 --- a/dts/Bindings/usb/dwc3.txt +++ b/dts/Bindings/usb/dwc3.txt @@ -45,6 +45,8 @@ Optional properties: a free-running PHY clock. - snps,dis-del-phy-power-chg-quirk: when set core will change PHY power from P0 to P1/P2/P3 without delay. + - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check + during HS transmit. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold diff --git a/dts/Bindings/usb/exynos-usb.txt b/dts/Bindings/usb/exynos-usb.txt index 9b4dbe3b2a..78ebebb66d 100644 --- a/dts/Bindings/usb/exynos-usb.txt +++ b/dts/Bindings/usb/exynos-usb.txt @@ -92,6 +92,8 @@ Required properties: parent's address space - clocks: Clock IDs array as required by the controller. - clock-names: names of clocks correseponding to IDs in the clock property + - vdd10-supply: 1.0V powr supply + - vdd33-supply: 3.0V/3.3V power supply Sub-nodes: The dwc3 core should be added as subnode to Exynos dwc3 glue. @@ -107,6 +109,8 @@ Example: #address-cells = <1>; #size-cells = <1>; ranges; + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; dwc3 { compatible = "synopsys,dwc3"; diff --git a/dts/Bindings/usb/iproc-udc.txt b/dts/Bindings/usb/iproc-udc.txt new file mode 100644 index 0000000000..272d7faf1a --- /dev/null +++ b/dts/Bindings/usb/iproc-udc.txt @@ -0,0 +1,21 @@ +Broadcom IPROC USB Device controller. + +The device node is used for UDCs integrated into Broadcom's +iProc family (Northstar2, Cygnus) of SoCs'. The UDC is based +on Synopsys Designware Cores AHB Subsystem Device Controller +IP. + +Required properties: + - compatible: Add the compatibility strings for supported platforms. + For Broadcom NS2 platform, add "brcm,ns2-udc","brcm,iproc-udc". + For Broadcom Cygnus platform, add "brcm,cygnus-udc", "brcm,iproc-udc". + - reg: Offset and length of UDC register set + - interrupts: description of interrupt line + - phys: phandle to phy node. + +Example: + udc_dwc: usb@664e0000 { + compatible = "brcm,ns2-udc", "brcm,iproc-udc"; + reg = <0x664e0000 0x2000>; + interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbdrd_phy>; diff --git a/dts/Bindings/usb/usb-ohci.txt b/dts/Bindings/usb/usb-ohci.txt index 9df4569685..e8766b08c9 100644 --- a/dts/Bindings/usb/usb-ohci.txt +++ b/dts/Bindings/usb/usb-ohci.txt @@ -10,6 +10,7 @@ Optional properties: - big-endian-desc : boolean, set this for hcds with big-endian descriptors - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc - no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA +- remote-wakeup-connected: remote wakeup is wired on the platform - num-ports : u32, to override the detected port count - clocks : a list of phandle + clock specifier pairs - phys : phandle + phy specifier pair |